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DALC208SC6 Datasheet(PDF) 6 Page - STMicroelectronics |
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DALC208SC6 Datasheet(HTML) 6 Page - STMicroelectronics |
6 / 14 page Technical information DALC208 6/14 Important A precaution to take is to put the protection device as close as possible to the disturbance source (generally the connector). Note: The measurements have been done with the DALC208SC6 in open circuit. Figure 9. ESD behavior: optimized layout and add of a capacitance of 100 nF Figure 10. ESD behavior: measurement conditions (with coupling capacitance) REF1=GND VI/O ESD SURGE I/O REF2=+Vcc C=100nF Lw Vcl+ = Vcc+Vf -Vf surge >0 surge <0 Vcl- = t Vcl+ POSITIVE SURGE t Vcl- NEGATIVE SURGE +5V TEST BOARD DALC 208 ESD SURGE Figure 11. Remaining voltage after the DALC208SC6 during positive ESD surge Figure 12. Remaining voltage after the DALC208SC6 during negative ESD surge IEC61000-4-2 Air Discharge (150pF/330 Ω) Vpp=15kV IEC61000-4-2 Air Discharge (150pF/330 Ω) Vpp=15kV |
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