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STMPE811 Datasheet(PDF) 13 Page - STMicroelectronics

Part # STMPE811
Description  8-bit port expander with advanced touchscreen controller
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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STMPE811 Datasheet(HTML) 13 Page - STMicroelectronics

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STMPE811
SPI interface
13/54
5.1.2
Register write
The following steps need to be followed for register write through SPI.
1.
Assert CS_n by driving a '0' on this pin.
2.
Drive a '0' on the first SCL launch clock on MOSI to select a write operation.
3.
The next 7 bits on MOSI denote the 7-bit register address (MSB first).
4.
The next byte on the MOSI denotes data to be written.
5.
The following transmissions on MOSI are considered byte-sized data. The register
address to which the following data is written depends on whether the autoincrement
bit in the SPICON register is set. If this bit has been set previously, the register address
is incremented for data writes.
5.1.3
Termination of data transfer
A transfer can be terminated before the last launch edge by deasserting the CS_n signal. If
the last launch clock is detected, it is assumed that the data transfer is successful.
5.2
SPI timing modes
The SPI timing modes are defined by CPHA and CPOL,CPHA and CPOL are read from the
"SDAT" and "A0" pins during power-up reset. The following four modes are defined
according to this setting.
The clocking diagrams of these modes are shown in ON reset. The device always operates
in mode 0. Once the bits are set in the SPICON register, the mode change takes effect on
the next transaction defined by the CS_n pin being deasserted and asserted.
Table 8.
SPI timing modes
CPOL_N (SDAT pin)
CPOL
CPHA (ADDR pin)
Mode
0100
0111
1002
1013


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