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XC866 Datasheet(PDF) 43 Page - Infineon Technologies AG |
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XC866 Datasheet(HTML) 43 Page - Infineon Technologies AG |
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43 / 396 page  XC866 Memory Organization User’s Manual 3-4 V 0.2, 2005-01 Memory Organization, V 0.2 3.3 Special Function Registers The Special Function Registers (SFRs) occupy direct internal data memory space in the range 80H to FFH. All registers, except the program counter, reside in the SFR area. The SFRs include pointers and registers that provide an interface between the CPU and the on-chip peripherals. As the 128-SFR range is less than the total number of registers required, address extension mechanisms are required to increase the number of addressable SFRs. The address extension mechanisms include: • Mapping •Paging 3.3.1 Address Extension by Mapping Address extension is performed at the system level by mapping. The SFR area is extended into two portions: the standard (non-mapped) SFR area and the mapped SFR area. Each portion supports the same address range 80H to FFH, bringing the number of addressable SFRs to 256. The extended address range is not directly controlled by the CPU instruction itself, but is derived from bit RMAP in the system control register SYSCON0 at address 8FH. To access SFRs in the mapped area, bit RMAP in SFR SYSCON0 must be set. Alternatively, the SFRs in the standard area can be accessed by clearing bit RMAP. The SFR area can be selected as shown in Figure 3-3. As long as bit RMAP is set, the mapped SFR area can be accessed. This bit is not cleared automatically by hardware. Thus, before standard/mapped registers are accessed, bit RMAP must be cleared/set, respectively, by software. SYSCON0 System Control Register 0 Reset Value: 00H 76 54 3 2 1 0 0RMAP rrw Field Bits Type Description RMAP 0rw Special Function Register Map Control 0 The access to the standard SFR area is enabled. 1 The access to the mapped SFR area is enabled. 0 [7:1] r Reserved Returns 0 if read; should be written with 0. |
Similar Part No. - XC866_05 |
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Similar Description - XC866_05 |
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