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STE10 Datasheet(PDF) 62 Page - STMicroelectronics |
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STE10 Datasheet(HTML) 62 Page - STMicroelectronics |
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62 / 66 page  STE10/100 62/66 Table 22. Flash Interface Timings Figure 18. Flash write timings Symbol Parameter Test Condition Min. Typ. Max. Units Tfcyc Read/Write Cycle Time ns Tfce Address to Read Data Setup Time ns Tfce CS# to Read Data Setup Time ns Tfoe OE# Active to Read Data Setup Time ns Tfdf OE# Inactive to Data Driven Delay Time ns Tfas Address Setup Time before WE# ns Tfah Address Hold Time after WE# ns Tfcs CS# Setup Time before WE# ns Tfch Address Hold Time after WE# ns Tfds Data Setup Time ns Tfdh Data Hold Time ns Tfwpw Write Pulse Width ns Tfwph Write Pulse Width High ns Tfasc Address Setup Time before CS# ns Tfahc Address Hold Time after CS# ns CS# WE# DATA ADDRESS Tfcyc Tfasc Tfah Tfasw Tahw Tfwpw Tfds Tfdh Tfcss Tfcsh Tfwph |
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