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DS83C520-QNL Datasheet(PDF) 3 Page - Dallas Semiconductor |
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DS83C520-QNL Datasheet(HTML) 3 Page - Dallas Semiconductor |
3 / 42 page DS87C520/DS83C520 3 of 42 DS87C530/DS83C520 BLOCK DIAGRAM Figure 1 PIN DESCRIPTION Table 1 DIP PLCC TQFP SIGNAL NAME DESCRIPTION 40 44 38 VCC VCC - +5V 20 22,23, 1 16, 17, 39 GND GND - Digital circuit ground. 9 10 4 RST RST - input. The RST input pin contains a Schmitt voltage input to recognize external active high Reset inputs. The pin also employs an internal pulldown resistor to allow for a combination of wired OR external Reset sources. An RC is not required for power-up, as the device provides this function internally. 18 19 20 21 14 15 XTAL2 XTAL1 XTAL1, XTAL2 - The crystal oscillator pins XTAL1 and XTAL2 provide support for parallel resonant, AT cut crystals. XTAL1 acts also as an input if there is an external clock source in place of a crystal. XTAL2 serves as the output of the crystal amplifier. 29 32 26 PSEN PSEN - Output. The Program Store Enable output. This signal is commonly connected to optional external ROM memory as a chip enable. PSEN will provide an active low pulse and is driven high when external ROM is not being accessed. |
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Similar Description - DS83C520-QNL |
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