All trademarks mentioned in this document

http://www.DigitalCoreDesign.com

are trademarks of their respective owners.

http://www.dcd.pl

Copyright 1999-2003 DCD – Digital Core Design. All Rights Reserved.

♦

Synthesis scripts

♦

Example application

♦

Technical support

◊

IP Core implementation support

◊

3 months maintenance

●

Delivery the IP Core updates, minor and

major versions changes

●

Delivery the documentation updates

●

Phone & email support

LICENSING

Comprehensible and clearly defined licensing

methods without royalty fees make using of IP

Core easy and simply.

Single Design

license allows use IP Core in

single FPGA bitstream and ASIC implementa-

tion.

Unlimited Designs, One Year

licenses allow

use IP Core in unlimited number of FPGA bit-

streams and ASIC implementations.

In all cases number of IP Core instantiations

within a design, and number of manufactured

chips are unlimited. There is no time restriction

except One Year license where time of use is

limited to 12 months.

SYMBOL

prgdatai(7:0)

xramdatai(7:0)

prgdatao(7:0)

prgrd

xramdatao(7:0)

xramaddr(23:0)

xramrd

xramwr

sfroe

sfrwe

sfrdatao(7:0)

sfraddr(7:0)

ramoe

ramwe

port0o(7:0)

port3o(7:0)

port2o(7:0)

port1o(7:0)

port0i(7:0)

port1i(7:0)

port2i(7:0)

port3i(7:0)

ramdatai(7:0)

sfrdatai(7:0)

int0

int1

int6

int2

int3

int4

int5

t0

gate0

t1

gate1

t2

t2ex

capture0

capture1

capture2

capture3

clk

reset

rxd0i

ramdatao(7:0)

ramaddr(7:0)

rxd1i

rxd1o

txd1

stop

pmm

mscli

msdai

msclo

msdao

rxd0o

txd0

xramdataz

si

mi

so

mo

scki

scko

sckz

docddatao

docdclk

docddatai

ss

sso(7:0)

prgwr

msclhs

prgaddr(15:0)

prgdataz

sscli

ssdai

ssclo

ssdao