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ADUC7027BST62 Datasheet(PDF) 3 Page - Analog Devices |
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ADUC7027BST62 Datasheet(HTML) 3 Page - Analog Devices |
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3 / 78 page  Preliminary Technical Data ADuC702x Series Rev. PrA | Page 3 of 78 ADUC702X—SPECIFICATIONS 1 Table 1. (AVDD = IOVDD = 2.7 V to 3.6 V, VREF = 2.5 V Internal Reference, fCORE = 45MHz, All specifications TA = TMAX to TMIN, unless otherwise noted.) Parameter ADuC702x Unit Test Conditions/Comments ADC CHANNEL SPECIFICATIONS ADC Powerup Time 500 uS DC Accuracy 2, 3 fSAMPLE = 1MSPS Resolution 12 Bits Integral Nonlinearity Integral Nonlinearity 4 ±1.5 ±0.5 ±2.0 LSB max LSB typ LSB max 2.5V internal reference 2.5V internal reference 1.0V external reference Differential Nonlinearity Differential Nonlinearity 4 DC Code Distribution +1/-0.9 ±0.5 +1/-0.9 1 LSB max LSB typ LSB max LSB typ 2.5V internal reference 2.5V internal reference 1.0V external reference ADC input is a dc voltage CALIBRATED ENDPOINT ERRORS 5 Offset Error Offset Error Match ±5 ±1 LSB max LSB typ Gain Error Gain Error Match ±5 ±1 LSB max LSB typ DYNAMIC PERFORMANCE Fin = 10kHz Sine Wave, fSAMPLE = 1MSPS Signal-to-Noise Ratio (SNR) 6 71 dB typ Total Harmonic Distortion (THD) -78 dB typ Peak Harmonic or Spurious Noise Channel-to-Channel Crosstalk 7 -78 -80 dB typ dB typ ANALOG INPUT Input Voltage Ranges Differential mode VCM8±VREF/2 Volts Single-ended mode 0 to VREF Volts Leakage Current ±5 µA max Input Capacitance 20 pF typ During ADC Acquisition ON-CHIP VOLTAGE REFERENCE Output Voltage 2.5 V 0.47µF from VREF to AGND Accuracy ±10 mV max Measured at TA = 25°C Reference Temperature Coefficient Power Supply Rejection Ratio ±10 80 ppm/°C typ dB typ Output Impedance Internal VREF Power-On Time 10 1 Ω typ ms typ EXTERNAL REFERENCE INPUT9 Input Voltage Range Input Impedance 0.625 AVDD TBD V min V max KΩ typ DAC CHANNEL SPECIFICATIONS RL = 5k Ω, C L = 100pF DC ACCURACY Resolution 12 Bits Relative Accuracy ±2 LSB typ Differential Nonlinearity ±1 LSB max Guaranteed Monotonic Offset Error ±2 ±5 mV max mV max DAC output unbuffered DAC output buffered Gain Error Gain Error Mismatch ±0.5 TBD % max % typ % of fullscale on DAC0 |
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