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STD4NB40-1 Datasheet(PDF) 1 Page - STMicroelectronics |
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STD4NB40-1 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 10 page  1/10 June 2001 STD4NB40 STD4NB40-1 N-CHANNEL 400V - 1.47 Ω - 4A DPAK/IPAK PowerMESH™ MOSFET s TYPICAL RDS(on) = 1.47 Ω s EXTREMELY HIGH dv/dt CAPABILITY s 100% AVALANCHE TESTED s GATE CHARGE MINIMIZED s ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL DESCRIPTION Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an ad- vanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprieraty edge termi- nation structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteris- tics. APPLICATIONS s HIGH CURRENT, HIGH SPEED SWITCHING s SWITH MODE POWER SUPPLIES (SMPS) s DC-DC CONVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT ABSOLUTE MAXIMUM RATINGS (•)Pulse width limited by safe operating area TYPE VDSS RDS(on) ID STD4NB40 400 V < 1.8 Ω 4 A Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 400 V VDGR Drain-gate Voltage (RGS = 20 kΩ) 400 V VGS Gate- source Voltage ± 30 V ID Drain Current (continuos) at TC = 25°C 4A ID Drain Current (continuos) at TC = 100°C 2.52 A IDM (q) Drain Current (pulsed) 16 A PTOT Total Dissipation at TC = 25°C 60 W Derating Factor 0.47 W/°C dv/dt (1) Peak Diode Recovery voltage slope 4 V/ns Tstg Storage Temperature –65 to 150 °C Tj Max. Operating Junction Temperature 150 °C (1) ISD≤ 4A, di/dt≤200 A/µs, VDD≤ V(BR)DSS, Tj≤TjMAX INTERNAL SCHEMATIC DIAGRAM 1 3 TO-252 DPAK 3 2 1 IPAK TO-251 |
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