ADP130-0.8-EVALZ datasheet(5/20 Pages) AD

Part #	ADP130-0.8-EVALZ

Description	350 mA, Low VIN, Low Quiescent Current, CMOS Linear Regulator

Download	20 Pages

Scroll/Zoom	100%

Manufacturer	AD [Analog Devices]

Direct Link	http://www.analog.com

Logo

5 / 20 page

ADP130

Rev. 0 | Page 5 of 20

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

Rating

VIN to GND

−0.3 V to

+3.6 V

VBIAS to GND

−0.3 V to

+6 V

EN to GND

−0.3 V to

+6 V

VOUT to GND

−0.3 V to VIN

Storage Temperature Range

−65°C to +150°C

Operating Temperature Range

−40°C to +125°C

Operating Junction Temperature

125°C

Lead Temperature (Soldering, 10 sec)

300°C

Stresses above those listed under absolute maximum ratings

may cause permanent damage to the device. This is a stress

rating only and functional operation of the device at these or

any other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

THERMAL DATA

Absolute maximum ratings apply only individually, not in combi-

nation. The ADP130 may be damaged when junction temperature

limits are exceeded. Monitoring ambient temperature does not

guarantee that the junction temperature is within the specified

temperature limits. In applications with high power dissipation

and poor thermal resistance, the maximum ambient temperature

may need to be derated. In applications with moderate power

dissipation and low PCB thermal resistance, the maximum ambient

temperature can exceed the maximum limit as long as the junction

temperature is within specification limits. The junction tempera-

ture (TJ) of the device is dependent on the ambient temperature

(TA), the power dissipation of the device (PD), and the junction-to-

ambient thermal resistance of the package (θJA). TJ is calculated

using the following formula:

TJ = TA + (PD × θJA)

The junction-to-ambient thermal resistance (θJA) of the package

is based on modeling and calculation using a four-layer board.

The junction-to-ambient thermal resistance is highly dependent

on the application and board layout. In applications where high

maximum power dissipation exists, close attention to thermal

board design is required. The value of θJA may vary, depending on

PCB material, layout, and environmental conditions. The specified

values of θJA are based on a four-layer, 4 in × 3 in circuit board.

For details about board construction, refer to JEDEC JESD51-7.

ΨJB is the junction-to-board thermal characterization parameter

with units of °C/W. ΨJB of the package is based on modeling and

calculation using a four-layer board. The JEDEC JESD51-12

document, Guidelines for Reporting and Using Package Thermal

Information, states that thermal characterization parameters are

not the same as thermal resistances. ΨJB measures the component

power flowing through multiple thermal paths rather than a single

path, as in thermal resistance (θJB). Therefore, ΨJB thermal paths

include convection from the top of the package as well as radiation

from the package, factors that make ΨJB more useful in real world

applications. Maximum junction temperature (TJ) is calculated

from the board temperature (TB) and power dissipation (PD), using

the following formula:

TJ = TB + (PD × ΨJB)

Refer to the JEDEC JESD51-8 and JESD51-12 documents for

more detailed information about ΨJB.

THERMAL RESISTANCE

θJA and ΨJB are specified for the worst-case conditions, that is, a

device soldered in a circuit board for surface-mount packages.

Table 4. Thermal Resistance

Package Type

θJA

ΨJB

Unit

5-Lead TSOT

170

43

°C/W

ESD CAUTION

Similar Part No. - ADP130-0.8-EVALZ

Manufacturer	Part #	Datasheet	Description
Cirrus Logic	ADP130-0.8-EVALZ	1Mb / 10P	Evaluation Kit Rev A

More results

Similar Description - ADP130-0.8-EVALZ

Manufacturer	Part #	Datasheet	Description
Analog Devices	ADP121-AUJZ12R7	667Kb / 20P	150 mA, Low Quiescent Current, CMOS Linear Regulator Rev. G
	ADP172	2Mb / 17P	300 mA, Low Quiescent Current, CMOS Linear Regulator Rev. F
	ADP121	986Kb / 20P	150 mA, Low Quiescent Current, CMOS Linear Regulator REV. 0
	ADP120	535Kb / 20P	100 mA, Low Quiescent Current, CMOS Linear Regulator Rev. A
	ADP172	579Kb / 20P	300 mA, Low Quiescent Current, CMOS Linear Regulator REV. 0
	ADP172_101	586Kb / 20P	300 mA, Low Quiescent Current CMOS Linear Regulator REV. B
Fortune Semiconductor C...	FS8844	691Kb / 10P	250 mA Low Quiescent Current LDO Linear Regulator
Analog Devices	ADP170	538Kb / 20P	300 mA, Low Quiescent Current, CMOS Linear Regulators REV. B
	ADP122ACPZ-2.6-R7	611Kb / 24P	5.5 V Input, 300 mA, Low Quiescent Current, CMOS Linear Regulator Rev. E
	ADP122ACPZ-1.8-R7	611Kb / 24P	5.5 V Input, 300 mA, Low Quiescent Current, CMOS Linear Regulator Rev. E

More results

ADP130-0.8-EVALZ Datasheet(PDF) 5 Page - Analog Devices

ADP130-0.8-EVALZ Datasheet(HTML) 5 Page - Analog Devices

Similar Part No. - ADP130-0.8-EVALZ

Similar Description - ADP130-0.8-EVALZ

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Datasheet Download

Link URL