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VOL OF PCA9518

VOL

EXPSDA1

EXPSDA2

EXPSCL1

EXPSCL2

BUS n

with n > 1

BUS 0

EXPANSION

BUS

BUS 1

9th Clock Cycle

9th Clock Cycle

SCL of Master

SDA of Master

SCL of Slave

SDA of Slave

Slave

PCA9518

SCPS132A – JUNE 2006 – REVISED JULY 2007

APPLICATION INFORMATION (continued)

If the bus master in Figure 3 were to write to the slave through the PCA9518, the waveform shown in Figure 4

would be created.

Figure 4. Bus Waveforms

PCA9518 and transmitted to bus 0.

and proceeding each data low-to-high transition for the master. The step height is the difference between the

low level driven by the master and the higher-voltage low level driven by the PCA9518 repeater. Its width

corresponds to an effective clock stretching coming from the PCA9518, which delays the rising edge of the

clock. That same magnitude of delay is seen on the rising edge of the data. The step on the rising edge of the

data is extended through the ninth clock pulse as the PCA9518 repeats the acknowledge from the slave to the

The SDA at the slave has a particularly interesting shape during the ninth clock cycle, when the slave pulls the

line below the value driven by the PCA9518 during the ACK and then returns to the PCA9518 level, creating a

foot before it completes the low-to-high transition. SDA lines, other than the one with the master and the one

with the slave, have a uniform low level driven by the PCA9518 repeater.

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