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FUNCTIONAL BLOCK DIAGRAM

PacketEngine:

PacketValidation

SubLVDS

SubLVDS

Counter

LineCount

PLL

x8

LowFrequency

Detector

Glitch

Supression

Standby,Shutdown,andStartupController

DOUT+

DOUT-

CLK+

CLK-

D[0:7]

HS

VS

MODE

DCLK

TXEN

8

8

&

SN65LVDS315

SLLS881A – DECEMBER 2007 – REVISED MARCH 2008

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

2

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