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ONET8501P Datasheet(PDF) 11 Page - Texas Instruments |
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ONET8501P Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 26 page  www.ti.com ONET8501P SLLS885 – FEBRUARY 2008 Table 14. Register 9 (0x09) Mapping – LOS Assert Level Register B register address 9 (0x09) bit 7 bit 6 bit 5 bit4 bit 3 bit 2 bit 1 bit 0 LOSBSEL LOSB6 LOSB5 LOSB4 LOSB3 LOSB2 LOSB1 LOSB0 Table 15. Register 10 (0x0A) Mapping – LOS Assert Level Register C register address 10 (0x0A) bit 7 bit 6 bit 5 bit4 bit 3 bit 2 bit 1 bit 0 LOSCSEL LOSC6 LOSC5 LOSC4 LOSC3 LOSC2 LOSC1 LOSC0 Table 16. Register 11 (0x0B) Mapping – LOS Assert Level Register D register address 11 (0x0B) bit 7 bit 6 bit 5 bit4 bit 3 bit 2 bit 1 bit 0 LOSDSEL LOSD6 LOSD5 LOSD4 LOSD3 LOSD2 LOSD1 LOSD0 Table 17. Register 14 (0x0E) Mapping – Selected Rate Setting (Read Only) register address 14 (0x0E) bit 7 bit 6 bit 5 bit4 bit 3 bit 2 bit 1 bit 0 – – – – SELRATE3 SELRATE2 SELRATE1 SELRATE0 Table 18. Register 15 (0x0F) Mapping – Selected LOS Level (Read Only) register address 15 (0x0F) bit 7 bit 6 bit 5 bit4 bit 3 bit 2 bit 1 bit 0 – SELLOS6 SELLOS5 SELLOS4 SELLOS3 SELLOS2 SELLOS1 SELLOS0 Table 19. Register Functionality SYMBOL REGISTER BIT FUNCTION DIS Output disable bit 3 Output disable bit: 1 = output disabled 0 = output enabled LOSRNG LOS Range bit 2 LOS range bit: 1 = high LOS assert voltage range 0 = low LOS assert voltage range OCDIS Offset cancellation disable bit 1 Offset cancellation disable bit: 1 = offset cancellation is disabled 0 = offset cancellation is enabled I2CDIS I2C disable bit 0 I2C disable bit: 1 = I2C is disabled. 0 = I2C is enabled. This is the default setting. THADJ7 Input threshold adjust bit 7 (MSB) Input threshold adjustment setting: THADJ6 Input threshold adjust bit 6 Maximum positive sift for 00000001 (1) THADJ5 Input threshold adjust bit 5 Minimum positive shift for 01111111 (127) THADJ4 Input threshold adjust bit 4 Zero shift for 10000000 (128) THADJ3 Input threshold adjust bit 3 Minimum negative shift for 10000001 (129) THADJ2 Input threshold adjust bit 2 Maximum negative shift for 11111111 (255) THADJ1 Input threshold adjust bit 1 THADJ0 Input threshold adjust bit 0 (LSB) Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s) :ONET8501P |
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