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DRV8809PAP Datasheet(PDF) 8 Page - Texas Instruments |
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DRV8809PAP Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 44 page  DRV8809 DRV8810 SLVS854A – JULY 2008 – REVISED JULY 2008 ............................................................................................................................................................... www.ti.com ELECTRICAL CHARACTERISTICS (continued) TJ = 0°C to 120°C, VM = 7 V to 40 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Charge-Pump VCP ( ＝P = 0.1 µF to 0.47 µF, Cbk = 0.01 µF ± 10%) VO(CP) Output voltage ILOAD = 0 mA, VM > VthVM2 VM + 10 VM + 13 V f(CP) Switching frequency 1.6 MHz tstart Start-up time CStorage = 0.1 µF, VM ≥ 16 V 0.5 2 ms Internal Clock OSCi fOSCi System clock frequency 5.76 6.4 7.04 MHz VREF Input VREF Reference voltage input 0.8 2.5 3.6 V Ileak-vr Input leak current 1 µA C_SELECT for DC-DC Start-Up Selection (DCDC_MODE = L) Vcs0 DC-DC all off 0 0.3 V Vcs1 Turn on ODB then ODA Pull down by external 200-k Ω resistor 1.3 2 V Vcs2 Turn on ODB then ODC As pin open 3 3.3 V C_SELECT for DC-DC Start-Up Selection (DCDC_MODE = H or Open, Ch-B/C Parallel Mode) Vcs0 DC-DC all off 0 0.3 V Vcs1 Turn on ODB/C then ODA Pull down by external 200-k Ω resistor 1.3 2 V Vcs2 Turn on ODA then ODB/C As pin open 3 3.6 V Three DC-DC Converters(2) 1.25 = VDINOPE Operating supply voltage Ratio to VOUT(DC) V VO VoutA = 1.5 V – 30 V, 20 V ≤ VDIN < 40 V –3 VO 3 ODA VoutB/C = 1.5 V – 10 V, 6.5 V ≤ VDIN < 20 V –3 VO 5 ODB Programmable with external % ODC reference on FBX VthVM– < VDIN < 6.5 V, VO ≤ 3.3 V –3 VO 5 × VDIN > 1.25 × Vout (largest) VFB FBX feedback voltage For ODA/B/C 1.50 V IO ODx ODx output current (dc) With external L and C 1.5 A ODBC output current (DC) IO ODBC With external L and C DCDC_MODE = H 3 A in Ch-B/Ch-C parallel mode IO ODx2 Output current (dc) at low VDIN VDIN = 7 V, VO = 5 V 0.8 A IO ODx3 Output current (dc) at low VDIN VDIN = 7 V, VO = 3.3 V 1.5 A fOSCD Switching (chopping frequency) fOSCD = (0,0) 90 100 110 kHz TJ = 25°C 0.35 FET ON resistance at 0.8 A for Rds(ON) Ω OD_x TJ = 120°C 0.50 5.5-V VO at VDIN = VthV_ 4 V VDIN = VthV_, VthV_ = 5-V load (dc) = 0.5 5 V-Low VO voltage to 5.5 V –30 % A(3) VO voltage drop from VDIN 1 V VO setting without kick UVP Vo_min6 when VDIN = VthVM+ VthVM+ = 6-V load (DC) = 0.5 A (4) 6 V (VO setting at VDIN = 10 V) (2) DCDC_MODE = H, Ch-B and Ch-C are in parallel driving mode. (3) Lower VDIN decrease gate drive and the voltage drop is increased. Specified by bench characterization only. (4) VOUT (at VDIN = VthVM+) is lower than VO setting. When VDIN is down to VthVM+, undervoltage protection (UVP) shuts down the device, in case the VO is set as VO > 7 V. Specified by design. 8 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): DRV8809 DRV8810 |
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