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BQ24152 Datasheet(PDF) 5 Page - Texas Instruments

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Part No. BQ24152
Description  Fully Integrated Switch-Mode One-Cell Li-Ion Charger with Full USB Compliance and USB-OTG Support
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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BQ24152 Datasheet(HTML) 5 Page - Texas Instruments

 
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bq24152
www.ti.com ...................................................................................................................................................................................................... SLUS847 – JUNE 2008
ELECTRICAL CHARACTERISTICS (continued)
Circuit of Figure 1, VBUS = 5 V, HZ_MODE = 0, OPA_MODE = 0 (charger mode operation), TJ = 0°C to 125°C, TJ = 25°C for
typical values (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT CURRENT LIMITING
IIN = 100 mA
88
93
98
mA
IIN
Input current limiting threshold
USB charge mode
IIN = 500 mA
450
475
500
VREF BIAS REGULATOR
VBUS >VIN(min) or V(AUXPWR) > V(BAT)min,
V
Vref
Internal bias regulator voltage
2
6.5
I(VREF) = 1 mA, C(VREF) = 1
µF
Vref output short current limit
30
mA
Voltage from BOOT pin to SW
V
During charge or boost operation
6.5
pin
BATTERY RECHARGE THRESHOLD
V(RCH)
Recharge threshold voltage
Below V(OREG)
100
120
150
mV
V(AUXPWR) decreasing below threshold,
Deglitch time
130
ms
tFALL = 100ns, 10 mV overdrive
STAT OUTPUTS
Low-level output saturation
IO = 10 mA, sink current
0.4
V
voltage, STAT
VOL(STAT)
High-level leakage current for
Voltage on STAT pin is 5 V
1
µA
STAT
I2C BUS LOGIC LEVELS AND TIMING CHARACTERISTICS
VOL
Output low threshold level
IO = 10 mA, sink current
0.4
V
VIL
Input low threshold level
0.4
V
VIH
Input high threshold level
1.2
V
I(BIAS)
Input bias current
V(pull-up) = 1.8 V, SDA and SCL
1
µA
f(SCL)
SCL clock frequency
3.4
MHz
BATTERY DETECTION
Battery detection current before
Begins after termination detected,
–0.45
mA
charge done (sink current) (1)
V(AUXPWR) ≤ V(OREG)
I(DETECT)
Battery detection time
262
ms
SLEEP COMPARATOR
Sleep-mode entry threshold,
V(SLP)
2.3 V
≤ V(AUXPWR) ≤ V(OREG), VBUS falling
+0.0
+0.04
+0.1
V
VBUS - VAUXPWR
Sleep-mode exit hysteresis
2.3 V
≤ V(AUXPWR) ≤ V(OREG)
40
100
160
mV
V(SLP_EXIT)
Deglitch time for VBUS rising
Rising voltage, 2-mV overdrive, tRISE = 100ns
30
ms
above V(SLP) + V(SLP_EXIT)
UNDERVOLTAGE LOCKOUT
UVLO
IC active threshold voltage
VBUS rising
3.05
3.3
3.55
V
UVLO(HYS)
IC active hysteresis
VBUS falling from above UVLO
120
150
mV
PWM
Internal top reverse blocking
IIN(LIMIT) = 500 mA, Measured from VBUS to
180
250
MOSFET on-resistance
PMID
Internal top N-channel Switching
Measured from PMID to SW
120
250
m
MOSFET on-resistance
Internal bottom N-channel
Measured from SW to PGND
150
200
MOSFET on-resistance
f(OSC)
Oscillator frequency
3
MHz
Frequency accuracy
–10%
10%
D(MAX)
Maximum duty cycle
99.5%
D(MIN)
Minimum duty cycle
0
Synchronous mode to
non-synchronous mode transition
Low side MOSFET cycle by cycle current sensing
100
mA
current threshold(2)
(1)
Negative charge current means the charge current flows from the battery to charger (discharging battery).
(2)
Bottom N-channel MOSFET always turns on for
≈60 ns and then turns off if current is too low.
Copyright © 2008, Texas Instruments Incorporated
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