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ST72321J Datasheet(PDF) 48 Page - STMicroelectronics |
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ST72321J Datasheet(HTML) 48 Page - STMicroelectronics |
48 / 179 page ST72321J 48/179 I/O PORTS (Cont’d) 9.5.1 I/O Port Implementation The I/O port register configurations are summa- rised as follows. Standard Ports PA5:4, PC7:0, PD5:0, PE1:0, PF7:6, 4 Interrupt Ports PB4, PB2:0, PF1:0 (with pull-up) PA3, PB3, PF2 (without pull-up) True Open Drain Ports PA7:6 Table 12. Port Configuration MODE DDR OR floating input 0 0 pull-up input 0 1 open drain output 1 0 push-pull output 1 1 MODE DDR OR floating input 0 0 pull-up interrupt input 0 1 open drain output 1 0 push-pull output 1 1 MODE DDR OR floating input 0 0 floating interrupt input 0 1 open drain output 1 0 push-pull output 1 1 MODE DDR floating input 0 open drain (high sink ports) 1 Port Pin name Input Output OR = 0 OR = 1 OR = 0 OR = 1 Port A PA7:6 floating true open-drain PA5:4 floating pull-up open drain push-pull PA3 floating floating interrupt open drain push-pull Port B PB3 floating floating interrupt open drain push-pull PB4, PB2:0 floating pull-up interrupt open drain push-pull Port C PC7:0 floating pull-up open drain push-pull Port D PD5:0 floating pull-up open drain push-pull Port E PE1:0 floating pull-up open drain push-pull Port F PF7:6, 4 floating pull-up open drain push-pull PF2 floating floating interrupt open drain push-pull PF1:0 floating pull-up interrupt open drain push-pull |
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