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ST72260G1 Datasheet(PDF) 80 Page - STMicroelectronics |
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ST72260G1 Datasheet(HTML) 80 Page - STMicroelectronics |
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80 / 171 page  ST72260G, ST72262G, ST72264G 80/171 SERIAL PERIPHERAL INTERFACE (Cont’d) 11.4.5.4 Single Master and Multimaster Configurations There are two types of SPI systems: – Single Master System – Multimaster System Single Master System A typical single master system may be configured, using a device as the master and four devices as slaves (see Figure 53). The master device selects the individual slave de- vices by using four pins of a parallel port to control the four SS pins of the slave devices. The SS pins are pulled high during reset since the master device ports will be forced to be inputs at that time, thus disabling the slave devices. Note: To prevent a bus conflict on the MISO line the master allows only one active slave device during a transmission. For more security, the slave device may respond to the master with the received data byte. Then the master will receive the previous byte back from the slave device if all MISO and MOSI pins are con- nected and the slave has not written to its SPIDR register. Other transmission security methods can use ports for handshake lines or data bytes with com- mand fields. Multi-Master System A multi-master system may also be configured by the user. Transfer of master control could be im- plemented using a handshake method through the I/O ports or by an exchange of code messages through the serial peripheral interface system. The multi-master system is principally handled by the MSTR bit in the SPICR register and the MODF bit in the SPICSR register. Figure 53. Single Master / Multiple Slave Configuration MISO MOSI MOSI MOSI MOSI MOSI MISO MISO MISO MISO SS SS SS SS SS SCK SCK SCK SCK SCK 5V Slave Device Slave Device Slave Device Slave Device Master Device |
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