ST72264G datasheet(39/171 Pages) STMICROELECTRONICS

Part #	ST72264G

Description	8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

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ST72260G, ST72262G, ST72264G

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I/O PORTS (Cont’d)

Figure 28. I/O Port General Block Diagram

Table 7. I/O Port Mode Options

Legend: NI - not implemented

Off - implemented not activated

On - implemented and activated

Note: The diode to VDD is not implemented in the

true open drain pads. A local protection between

the pad and VOL is implemented to protect the de-

vice against positive stress.

Configuration Mode

Pull-Up

P-Buffer

Diodes

to VDD

to VSS

Input

Floating with/without Interrupt

Off

On

Pull-up with/without Interrupt

On

Output

Push-pull

Off

On

Open Drain (logic level)

Off

True Open Drain

NI

NI (see note)

DR

DDR

OR

PAD

VDD

ALTERNATE

ENABLE

ALTERNATE

OUTPUT

1

0

OR SEL

DDR SEL

DR SEL

PULL-UP

CONDITION

P-BUFFER

(see table below)

N-BUFFER

PULL-UP

(see table below)

1

0

ANALOG

INPUT

If implemented

ALTERNATE

INPUT

VDD

DIODES

(see table below)

FROM

OTHER

BITS

EXTERNAL

REQUEST (eix)

INTERRUPT

SENSITIVITY

SELECTION

CMOS

SCHMITT

TRIGGER

REGISTER

ACCESS

BIT

From on-chip periphera

l

To on-chip peripheral

Note: Refer to the Port Configuration

table for device specific information.

Combinational

Logic

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