![]() |
Electronic Components Datasheet Search |
|
ST6215C Datasheet(PDF) 45 Page - STMicroelectronics |
|
ST6215C Datasheet(HTML) 45 Page - STMicroelectronics |
45 / 105 page ![]() ST6215C/ST6225C 45/105 WATCHDOG TIMER (Cont’d) These instructions test the C bit and reset the MCU (i.e. disable the Watchdog) if the bit is set (i.e. if the Watchdog is active), thus disabling the Watchdog. For more information on the use of the watchdog, please read application note AN1015. Note: This note applies only when the watchdog is used as a standard timer. It is recommended to read the counter twice, as it may sometimes return an invalid value if the read is performed while the counter is decremented (counter bits in transient state). To validate the return value, both values read must be equal. The counter decrements eve- ry 384 µs at 8 MHz f OSC. 9.1.5 Low Power Modes 9.1.6 Interrupts None. Mode Description WAIT No effect on Watchdog. STOP Behaviour depends on the EXTCNTL option in the Option bytes: 1. Watchdog disabled: The MCU will enter Stop mode if a STOP instruction is executed. 2. Watchdog enabled and EXTCNTL option disabled: If a STOP instruction is encountered, it is interpreted as a WAIT. 3. Watchdog and EXTCNTL option enabled: If a STOP instruction is encountered when the NMI pin is low, it is interpreted as a WAIT. If, however, the STOP instruction is encountered when the NMI pin is high, the Watchdog counter is frozen and the CPU en- ters STOP mode. When the MCU exits STOP mode (i.e. when an interrupt is generated), the Watchdog resumes its activity. 1 |