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ST6215C Datasheet(PDF) 28 Page - STMicroelectronics |
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ST6215C Datasheet(HTML) 28 Page - STMicroelectronics |
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28 / 105 page 
ST6215C/ST6225C 28/105 Figure 17. Interrupts Block Diagram NMI ESB BIT VDD LATCH CLEARED BY H/W AT START OF VECTOR #0 ROUTINE VECTOR #0 LES BIT 1 0 LATCH CLEARED BY H/W AT START OF VECTOR #1 VECTOR #2 VECTOR #3 VECTOR #4 LATCH CLEARED BY H/W AT START OF VECTOR #2 ROUTINE I/O PORT REGISTER CONFIGURATION “INPUT WITH INTERRUPT” I/O PORT REGISTER CONFIGURATION “INPUT WITH INTERRUPT” EXIT FROM STOP/WAIT VECTOR #1 ROUTINE TIMER A/D CONVERTER TMZ BIT ETI BIT EAI BIT EOC BIT GEN BIT PB0..PB7 PA0..PA7 (TSCR REGISTER) (ADCR REGISTER) (IOR REGISTER) (IOR REGISTER) (IOR REGISTER) PC4..PC7 1 |
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