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EM645FV8AS-85S Datasheet(PDF) 2 Page - Emerging Memory & Logic Solutions Inc |
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EM645FV8AS-85S Datasheet(HTML) 2 Page - Emerging Memory & Logic Solutions Inc |
2 / 11 page EM620FV16B Series Low Power, 128Kx16 SRAM 2 FEATURES - Process Technology : 0.15 µm Full CMOS - Organization :128K x16 - Power Supply Voltage => EM620FV16B : 2.7~3.6V - Low Data Retention Voltage : 1.5V - Three state output and TTL Compatible - Packaged product designed for 45/55/70ns GENERAL PHYSICAL SPECIFICATIONS - Backside die surface of polished bare silicon - Typical Die Thickness = 725um +/-15um - Typical top-level metallization : => Metal (Ti/AlCu/TiN/ARC SiON/SiO2) : 5.2K Angstroms - Topside Passivation : => Passivation (HDP/pNIT/PIQ) : 5.4K Angstroms - Wafer diameter : 8 inch OPTIONS - C1/W1 : DC Probed Die/Wafer @ Hot Temp - C2/W2 : DC/AC Probed Die/Wafer @ Hot Temp 29 56 +(0.0) EM620FV16B (Dual C/S) 128K x16 Bit Low Power and Low Voltage CMOS Static RAM BONDING INSTRUCTIONS The 2M full CMOS SRAM die has total 56pads. Refer to the bond pad location and identification table for X, Y coordinates. EMLSI recommends using a bond wire on back side of die onto Vss bond pad for improved noise immunity. 28 1 x y EMLSI LOGO I/O Circuit Column Select Data Cont Data Cont Pre-charge Circuit Memory Array 1024 x 2048 A1 A2 A3 A4 A5 A6 A7 A0 A8 A9 A10 A11 A12 A13 A14 A15 A16 WE OE UB LB CS1 I/O0 ~ I/O7 I/O8 ~ I/O15 VCC VSS Control Logic CS2 PAD DESCRIPTIONS Name Function Name Function CS1,CS2 Chip select inputs Vcc Power Supply OE Output Enable input Vss Ground WE Write Enable input UB Upper Byte (I/O8~15) A0~A16 Address Inputs LB Lower Byte (I/O0~7) I/O0~I/O15 Data Inputs/Outputs NC No Connection |
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