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24C04 Datasheet(PDF) 10 Page - STMicroelectronics

Part # 24C04
Description  4 Kbit Serial I2C Bus EEPROM with User-Defined Block Write Protection
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

24C04 Datasheet(HTML) 10 Page - STMicroelectronics

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The sequence is as follows:
– Initial condition: a Write is in progress (see Figure
8).
– Step 1: the Master issues a START condition
followed by a Device Select byte (1st byte of the
new instruction).
– Step 2: if the memory is busy with the internal
write cycle, no ACK will be returned and the
master goes back to Step 1. If the memory has
terminated the internal write cycle, it will re-
spond with an ACK, indicating that the memory
is ready to receive the second part of the next
instruction (the first byte of this instruction was
already sent during Step 1).
Write Protection. Data in the upper block of 256
bytes of the memory may be write protected. The
memory is write protected between a boundary
address and the top of memory (address 1FFh)
when the PRE input pin is taken high and when the
Protect Flag (bit b2 in location 1FFh) is set to ’0’.
The boundary address is user defined by writing it
in the Block Address Pointer. The Block Address
Pointer is an 8 bit EEPROM register located at the
address 1FFh. It is composed by 5 MSBs Address
Pointer, which defines the bottom boundary ad-
dress, and 3 LSBs which must be programmed at
DEVICE OPERATION (cont’d)
’0’. This Address Pointer can therefore address a
boundary in steps of 8 bytes.
The sequence to use the Write Protected feature
is:
– write the data to be protected into the top of the
memory, up to, but not including, location 1FFh;
– set the protection by writing the correct bottom
boundary address in the
Address Pointer (5
MSBs of location 1FFh) with bit b2 (Protect flag)
set to ’0’. Note that for a correct fonctionality of
the memory, all the 3 LSBs of the Block Address
Pointer must also be programmed at ’0’.
The area will now be protected when the PRE input
pin is taken High. While the PRE input pin is read
at ’0’ by the memory, the location 1FFh can be used
as a normal EEPROM byte.
Caution: Special attention must be used when
using the protect mode together with the Multibyte
Write mode (MODE input pin High). If the Multibyte
Write starts at the location right below the first byte
of the Write Protected area, then the instruction will
write over the first 3 bytes of the Write Protected
area. The area protected is therefore smaller than
the content defined in the location 1FFh, by 3 bytes.
This does not apply to the Page Write mode as the
address counter ’roll-over’ and thus cannot go
above the 8 bytes lower boundary of the protected
area.
BYTE WRITE
DEV SEL
BYTE ADDR
DATA IN
MULTIBYTE
AND
PAGE WRITE
DEV SEL
BYTE ADDR
DATA IN 1
DATA IN 2
AI00793
DATA IN N
ACK
ACK
ACK
R/W
ACK
ACK
ACK
R/W
ACK
ACK
Figure 9. Write Modes Sequence (ST24/25C04)
10/16
ST24/25C04, ST24/25W04


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