6.1.3
Power Control ........................................................................................................................... 57
6.1.4
Clock Control ............................................................................................................................ 57
6.1.5
System Control ......................................................................................................................... 59
6.2
Initialization and Configuration ................................................................................................... 59
6.3
Register Map ............................................................................................................................ 60
6.4
Register Descriptions ................................................................................................................ 61
7
Internal Memory ............................................................................................................... 109
7.1
Block Diagram ........................................................................................................................ 109
7.2
Functional Description ............................................................................................................. 109
7.2.1
SRAM Memory ........................................................................................................................ 109
7.2.2
Flash Memory ......................................................................................................................... 110
7.3
Flash Memory Initialization and Configuration ........................................................................... 111
7.3.1
Flash Programming ................................................................................................................. 111
7.3.2
Nonvolatile Register Programming ........................................................................................... 112
7.4
Register Map .......................................................................................................................... 112
7.5
Flash Register Descriptions (Flash Control Offset) ..................................................................... 113
7.6
Flash Register Descriptions (System Control Offset) .................................................................. 120
8
General-Purpose Input/Outputs (GPIOs) ....................................................................... 133
8.1
Functional Description ............................................................................................................. 133
8.1.1
Data Control ........................................................................................................................... 134
8.1.2
Interrupt Control ...................................................................................................................... 135
8.1.3
Mode Control .......................................................................................................................... 136
8.1.4
Commit Control ....................................................................................................................... 136
8.1.5
Pad Control ............................................................................................................................. 136
8.1.6
Identification ........................................................................................................................... 136
8.2
Initialization and Configuration ................................................................................................. 136
8.3
Register Map .......................................................................................................................... 137
8.4
Register Descriptions .............................................................................................................. 139
9
General-Purpose Timers ................................................................................................. 174
9.1
Block Diagram ........................................................................................................................ 174
9.2
Functional Description ............................................................................................................. 175
9.2.1
GPTM Reset Conditions .......................................................................................................... 175
9.2.2
32-Bit Timer Operating Modes .................................................................................................. 176
9.2.3
16-Bit Timer Operating Modes .................................................................................................. 177
9.3
Initialization and Configuration ................................................................................................. 181
9.3.1
32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 181
9.3.2
32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 182
9.3.3
16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 182
9.3.4
16-Bit Input Edge Count Mode ................................................................................................. 183
9.3.5
16-Bit Input Edge Timing Mode ................................................................................................ 183
9.3.6
16-Bit PWM Mode ................................................................................................................... 184
9.4
Register Map .......................................................................................................................... 184
9.5
Register Descriptions .............................................................................................................. 185
10
Watchdog Timer ............................................................................................................... 210
10.1
Block Diagram ........................................................................................................................ 210
10.2
Functional Description ............................................................................................................. 210
10.3
Initialization and Configuration ................................................................................................. 211
November 30, 2007
4
Preliminary
Table of Contents