10.2.1 GPTM Reset Conditions .......................................................................................................... 197
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 197
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 199
10.3
Initialization and Configuration ................................................................................................. 203
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 203
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 204
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 204
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 205
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 205
10.3.6 16-Bit PWM Mode ................................................................................................................... 206
10.4
Register Map .......................................................................................................................... 206
10.5
Register Descriptions .............................................................................................................. 207
11
Watchdog Timer ............................................................................................................... 229
11.1
Block Diagram ........................................................................................................................ 229
11.2
Functional Description ............................................................................................................. 229
11.3
Initialization and Configuration ................................................................................................. 230
11.4
Register Map .......................................................................................................................... 230
11.5
Register Descriptions .............................................................................................................. 231
12
ADC ................................................................................................................................... 252
12.1
Block Diagram ........................................................................................................................ 253
12.2
Functional Description ............................................................................................................. 253
12.2.1 Sample Sequencers ................................................................................................................ 253
12.2.2 Module Control ........................................................................................................................ 254
12.2.3 Hardware Sample Averaging Circuit ......................................................................................... 255
12.2.4 Analog-to-Digital Converter ...................................................................................................... 255
12.2.5 Test Modes ............................................................................................................................. 255
12.2.6 Internal Temperature Sensor .................................................................................................... 255
12.3
Initialization and Configuration ................................................................................................. 256
12.3.1 Module Initialization ................................................................................................................. 256
12.3.2 Sample Sequencer Configuration ............................................................................................. 256
12.4
Register Map .......................................................................................................................... 257
12.5
Register Descriptions .............................................................................................................. 258
13
UART ................................................................................................................................. 285
13.1
Block Diagram ........................................................................................................................ 286
13.2
Functional Description ............................................................................................................. 286
13.2.1 Transmit/Receive Logic ........................................................................................................... 286
13.2.2 Baud-Rate Generation ............................................................................................................. 287
13.2.3 Data Transmission .................................................................................................................. 288
13.2.4 Serial IR (SIR) ......................................................................................................................... 288
13.2.5 FIFO Operation ....................................................................................................................... 289
13.2.6 Interrupts ................................................................................................................................ 289
13.2.7 Loopback Operation ................................................................................................................ 290
13.2.8 IrDA SIR block ........................................................................................................................ 290
13.3
Initialization and Configuration ................................................................................................. 290
13.4
Register Map .......................................................................................................................... 291
13.5
Register Descriptions .............................................................................................................. 292
14
SSI ..................................................................................................................................... 325
5
June 04, 2007
Preliminary
LM3S2739 Microcontroller