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ICS87993AYI Datasheet(PDF) 6 Page - Integrated Circuit Systems |
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ICS87993AYI Datasheet(HTML) 6 Page - Integrated Circuit Systems |
6 / 16 page 87993AYI www.icst.com/products/hiperclocks.html REV. B May 21, 2003 6 Integrated Circuit Systems, Inc. ICS87993I 1-TO-5 DIFFERENTIAL-TO-3.3V LVPECL PLL CLOCK DRIVER W/DYNAMIC CLOCK SWITCH APPLICATION INFORMATION As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS87993I provides sepa- rate power supplies to isolate any high switching noise from the outputs to the internal PLL. V CC and VCCA should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10 Ω resistor along with a 10 µF and a .01µF bypass capacitor should be connected to each V CCA pin. FIGURE 1. POWER SUPPLY FILTERING 10 Ω V CCA 10 µF .01 µF 3.3V .01 µF V CC The clock layout topology shown below is a typical termina- tion for LVPECL outputs. The two different layouts mentioned are recommended only as guidelines. FOUT and nFOUT are low impedance follower outputs that generate ECL/LVPECL compatible outputs. Therefore, terminat- ing resistors (DC current path to ground) or current sources must be used for functionality. These outputs are designed to FIGURE 2B. LVPECL OUTPUT TERMINATION 3.3V F OUT F IN 5 2 Zo Z o 5 2 Z o 3 2 Z o 3 2 Z o = 50Ω Z o = 50Ω FIGURE 2A. LVPECL OUTPUT TERMINATION RTT = 1 (V OH + VOL / VCC –2) –2 Z o Z o = 50Ω Z o = 50Ω 50 Ω 50 Ω RTT V CC - 2V F IN F OUT drive 50 Ω transmission lines. Matched impedance techniques should be used to maximize operating frequency and minimize signal distortion. Figures 2A and 2B show two different layouts which are recommended only as guidelines. Other suitable clock layouts may exist and it would be recommended that the board designers simulate to guarantee compatibility across all printed circuit and clock component process variations. TERMINATION FOR LVPECL OUTPUTS POWER SUPPLY FILTERING TECHNIQUES |
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