10 / 37 page
2005 May 20
10 of 37
data sheet (v3)
Dot-matrix STN LCD 64-SEGMENT Driver with 64-row x 64-column Display Data Memory
SBN0064G
Avant Electronics
4
A SBN6400G AND SBN0064G-BASED DISPLAY SYSTEM
A SBN6400G and SBN0064G-based display system is shown in Fig. 5.
The SBN6400G contains timing generation circuit and 64 COMMON drivers. The timing generation circuit generates
operating clocks and display control signals (frame signal FRM , COMMON scan signal CL, and AC frame signal M), for
itself and the SBN0064G.
The SBN0064G contains 64 SEGMENT drivers, Display Data Memory, and interface circuit with a host microcontroller.
Host
Address bus
Data bus
Control bus
SBN0064G
SBN6400G
LCD Panel
SEG0
SEG1
SEG62
SEG63
COM0
COM1
COM62
COM63
Fig.5 A SBN6400G and SBN0064G-based display system
microcontroller
RESET
Decoder
Display Control
Signals
Display Data
Memory
Registers
LCD Bias Circuit
Microcontroller
Interface
Clock generation
circuit
clocks and
display control
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