Electronic Components Datasheet Search
  English  ▼


STK14C88 Datasheet(PDF) 9 Page - Simtek Corporation

Part # STK14C88
Description  32Kx8 AutoStore nvSRAM
Download  19 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  SIMTEK [Simtek Corporation]
Direct Link  http://www.simtek.com
Logo SIMTEK - Simtek Corporation

STK14C88 Datasheet(HTML) 9 Page - Simtek Corporation

Back Button STK14C88_08 Datasheet HTML 5Page - Simtek Corporation STK14C88_08 Datasheet HTML 6Page - Simtek Corporation STK14C88_08 Datasheet HTML 7Page - Simtek Corporation STK14C88_08 Datasheet HTML 8Page - Simtek Corporation STK14C88_08 Datasheet HTML 9Page - Simtek Corporation STK14C88_08 Datasheet HTML 10Page - Simtek Corporation STK14C88_08 Datasheet HTML 11Page - Simtek Corporation STK14C88_08 Datasheet HTML 12Page - Simtek Corporation STK14C88_08 Datasheet HTML 13Page - Simtek Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 19 page
background image
Feb, 2008
Document Control #ML0014 Rev 2.0
The STK14C88 has two separate modes of opera-
tion: SRAM mode and nonvolatile mode. In SRAM
mode, the memory operates as a standard fast
static RAM. In nonvolatile mode, data is transferred
from SRAM to nonvolatile elements (the STORE
operation) or from nonvolatile elements to SRAM
(the RECALL operation). In this mode SRAM func-
tions are disabled.
The STK14C88 is a high-speed memory and so
must have a high-frequency bypass capacitor of
approximately 0.1
μF connected between V
CAP and
SS, using leads and traces that are as short as pos-
sible. As with all high-speed CMOS ICs, normal care-
ful routing of power, ground and signals will help
prevent noise problems.
The STK14C88 performs a READ cycle whenever E
and G are low and W and HSB are high. The
address specified on pins A
0-14 determines which of
the 32,768 data bytes will be accessed. When the
is initiated by an address transition, the out-
puts will be valid after a delay of t
AVQV (READ cycle
#1). If the READ is initiated by E or G, the outputs will
be valid at t
ELQV or at tGLQV, whichever is later (READ
cycle #2). The data outputs will repeatedly respond to
address changes within the t
AVQV access time without
the need for transitions on any control input pins, and
will remain valid until another address change or until
E or G is brought high, or W or HSB is brought low.
A WRITE cycle is performed whenever E and W are
low and HSB is high. The address inputs must be
stable prior to entering the WRITE cycle and must
remain stable until either E or W goes high at the
end of the cycle. The data on the common I/O pins
0-7 will be written into the memory if it is valid tDVWH
before the end of a W controlled WRITE or t
before the end of an E controlled WRITE.
It is recommended that G be kept high during the
entire WRITE cycle to avoid data bus contention on
common I/O lines. If G is left low, internal circuitry
will turn off the output buffers t
WLQZ after W goes low.
During power up, or after any low-power condition
CAP < VRESET), an internal RECALL request will be
latched. When V
CAP once again exceeds the sense
voltage of V
SWITCH, a RECALL cycle will automatically
be initiated and will take t
RESTORE to complete.
If the STK14C88 is in a WRITE state at the end of
power-up RECALL, the SRAM data will be corrupted.
To help avoid this situation, a 10K Ohm resistor
should be connected either between W and system
CC or between E and system VCC.
The STK14C88 software STORE cycle is initiated by
executing sequential E controlled READ cycles from
six specific address locations. During the STORE
cycle an erase of the previous nonvolatile data is
first performed, followed by a program of the nonvol-
atile elements. The program operation copies the
data into nonvolatile memory. Once a STORE
cycle is initiated, further input and output are dis-
abled until the cycle is completed.
Because a sequence of READs from specific
addresses is used for STORE initiation, it is impor-
tant that no other READ or WRITE accesses inter-
vene in the sequence, or the sequence will be
aborted and no STORE or RECALL will take place.
To initiate the software STORE cycle, the following
sequence must be performed:
Read address
0E38 (hex)
Valid READ
Read address
31C7 (hex)
Valid READ
Read address
03E0 (hex)
Valid READ
Read address
3C1F (hex)
Valid READ
Read address
303F (hex)
Valid READ
Read address
0FC0 (hex)
Initiate STORE cycle
The software sequence must be clocked with E con-
trolled READs.
Once the sixth address in the sequence has been
entered, the STORE cycle will commence and the
chip will be disabled. It is important that READ cycles
and not WRITE cycles be used in the sequence,
although it is not necessary that G be low for the
sequence to be valid. After the t
STORE cycle time has
been fulfilled, the SRAM will again be activated for
and WRITE operation.

Similar Part No. - STK14C88_08

ManufacturerPart #DatasheetDescription
List of Unclassifed Man...
STK14C88-3 ETC-STK14C88-3 Datasheet
371Kb / 13P
   32K x 8 AutoStore??nvSRAM QuantumTrap CMOS Nonvolatile StaticRAM
Simtek Corporation
STK14C88-3 SIMTEK-STK14C88-3 Datasheet
492Kb / 17P
   32Kx8 AutoStore nvSRAM
STK14C88-3 SIMTEK-STK14C88-3 Datasheet
425Kb / 18P
   32Kx8 AutoStore nvSRAM
Cypress Semiconductor
STK14C88-3 CYPRESS-STK14C88-3 Datasheet
618Kb / 17P
   256 Kbit (32K x 8) AutoStore nvSRAM
STK14C88-3 CYPRESS-STK14C88-3 Datasheet
1Mb / 18P
   256 Kbit (32K x 8) AutoStore nvSRAM Unlimited Read/Write endurance
More results

Similar Description - STK14C88_08

ManufacturerPart #DatasheetDescription
Simtek Corporation
STK14C88-3 SIMTEK-STK14C88-3 Datasheet
492Kb / 17P
   32Kx8 AutoStore nvSRAM
STK16C88 SIMTEK-STK16C88_08 Datasheet
359Kb / 13P
   32Kx8 AutoStore nvSRAM
STK14D88 SIMTEK-STK14D88_08 Datasheet
519Kb / 20P
   32Kx8 Autostore nvSRAM
STK14C88 SIMTEK-STK14C88 Datasheet
397Kb / 19P
   32Kx8 AutoStore nvSRAM
STK14D88 SIMTEK-STK14D88 Datasheet
564Kb / 19P
   32Kx8 Autostore nvSRAM
Cypress Semiconductor
STK14D88 CYPRESS-STK14D88 Datasheet
422Kb / 17P
   32Kx8 AutoStore nvSRAM
Simtek Corporation
STK14C88-3 SIMTEK-STK14C88-3_08 Datasheet
425Kb / 18P
   32Kx8 AutoStore nvSRAM
STK16C88-3 SIMTEK-STK16C88-3_08 Datasheet
343Kb / 13P
   32Kx8 AutoStore nvSRAM
STK16C88-3 SIMTEK-STK16C88-3 Datasheet
363Kb / 12P
   32Kx8 AutoStore nvSRAM
STK16C88 SIMTEK-STK16C88 Datasheet
378Kb / 12P
   32Kx8 AutoStore nvSRAM
More results

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Datasheet Download

Go To PDF Page

Link URL

Privacy Policy
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com

Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com