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SM65MLVD202AD Datasheet(PDF) 11 Page - Texas Instruments |
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SM65MLVD202AD Datasheet(HTML) 11 Page - Texas Instruments |
11 / 25 page www.ti.com 15 pF tpZL tpLZ VOL VOL +0.5 V VO RL 499 Ω _ + VTEST B A RE 1.2 V Inputs VCC 1 V VCC VCC/2 0 V VCC VCC/2 VTEST A RE R 0 V 1.4 V A tpZH tpHZ 0 V VOH -0.5 V VCC VCC/2 0 V VOH VCC/2 RE VO R Output VTEST CL SN65MLVD200A, SN65MLVD202A SN65MLVD204A, SN65MLVD205A SLLS573 – DECEMBER 2003 A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, frequency = 1 MHz, duty cycle = 50 ± 5%. B. RL is 1% tolerance, metal film, surface mount, and located within 2 cm of the D.U.T. C. CL is the instrumentation and fixture capacitance within 2 cm of the DUT and ±20%. Figure 11. Receiver Enable/Disable Time Test Circuit and Waveforms 11 Submit Documentation Feedback |
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