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TMS29LF040 Datasheet(PDF) 5 Page - Texas Instruments |
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TMS29LF040 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 38 page TMS29LF040, TMS29VF040 524288 BY 8BIT FLASH MEMORIES SMJS825D − SEPTEMBER 1995 − REVISED JUNE 1998 5 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 operation Table 1 summarizes the operation modes. Table 1. Operation Modes MODE FUNCTIONS† MODE E G W A0 A1 A6 A9 DQ0 − DQ7 Read VIL VIL VIH A0 A1 A6 A9 Data out Output disable VIL VIH VIH X X X X Hi-Z Standby and write inhibit VIH X X X X X X Hi-Z Algorithm-selection mode VIL VIL VIH VIL VIL VIL VID Mfr. equivalent code 97h Algorithm-selection mode VIL VIL VIH VIH VIL VIL VID Device equivalent code 94h Write‡ VIL VIH VIL A0 A1 A6 A9 Data in Sector-protect§ VIL VID VIL X X X VID X Sector-protect verify§ VIL VIL VIH VIL VIH VIL VID Data out Sector-unprotect§¶ VID VID VIL X X VIH VID X Sector-unprotect verify§ VIL VIL VIH VIL VIH VIH VID Data out Erase operations VIL VIH See Note 1 See Note 1 See Note 1 See Note 1 See Note 1 See Note 1 † X can be VIL or VIH. ‡ See Table 3 for valid address and data during write (byte program). § Operation at VCC = 3.3 V and TA = 25°C. ¶ Address pins A12 and A16 = VIH. NOTE 1: See Figure 6 through Figure 9. read mode To read the output of the TMS29xF040, a low-level logic signal is applied to the E and G pins. When two or more TMS29xF040 devices are connected in parallel, the output of any one device can be read without interference. The E pin is power control and is used for device selection. The G pin is output control and is used to gate the data output onto the bus from the selected device. The address-access time (tAVQV) is the delay from stable address to valid output data. The chip-enable access time (tELQV) is the delay from E = VIL and stable addresses to valid output data. The output-enable access time (tGLQV) is the delay from G = VIL to valid output data when E = VIL and addresses are stable for at least the duration of tAVQV−tGLQV. standby mode The ICC supply current is reduced by applying a logic-high level on E to enter the standby mode. In the standby mode, the outputs are placed in the high-impedance state. Applying a CMOS logic-high level on E reduces the current to 100 µA maximum. If the TMS29xF040 is deselected during erasure or programming, the device continues to draw active current until the operation is complete. output disable When either G = VIH or E = VIH, output from the device is disabled and the output pins (DQ0−DQ7) are placed in the high-impedance state. |
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