![]() |
Electronic Components Datasheet Search |
|
ADS5545 Datasheet(PDF) 28 Page - Texas Instruments |
|
|
ADS5545 Datasheet(HTML) 28 Page - Texas Instruments |
28 / 54 page ![]() www.ti.com 82 84 86 88 90 67 68 66 69 70 SNR SFDR T − Free-AirT A emperature − C o −40 10 35 85 f =50.1MHz IN 50 −15 F − SamplingFrequency − MSPS S 60 61 62 63 64 65 66 67 68 69 40 60 80 100 120 140 160 180 200 Default PowerMode1 PowerMode2 PowerMode3 Input Amplitude − dBFS 25 35 45 55 65 75 85 95 105 −40 −30 −20 −10 0 64 65 63 66 67 71 68 69 70 SFDR(dBc) SNR(dBFS) f =50.1MHz IN 81 82 83 84 85 86 Clock Amplitude-VPP 66 67 68 69 70 71 SNR f =20.1MHz SineWaveInputClock IN SFDR 1.3 0.8 0.5 0.3 1.5 2.1 1.1 2.3 2.8 1.8 2.5 InputClockDutyCycle − % 82 83 84 85 86 87 35 40 45 50 55 60 67 68 66 69 70 71 SFDR f =20.1MHz IN SNR 65 OutputCode 0 10 30 40 50 70 80 90 100 20 60 110 ADS5517 SLWS203 – DECEMBER 2007 TYPICAL CHARACTERISTICS (continued) All plots are at 25 °C, AVDD = DRVDD = 3.3 V, sampling frequency = 200 MSPS, sine wave input clock, 1.5 V PP differential clock amplitude, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, 0 dB gain, DDR LVDS data output (unless otherwise noted) SNR vs SAMPLING FREQUENCY PERFORMANCE vs TEMPERATURE (Across Power Scaling Modes) Figure 21. Figure 22. PERFORMANCE vs INPUT AMPLITUDE PERFORMANCE vs CLOCK AMPLITUDE Figure 23. Figure 24. OUTPUT NOISE HISTOGRAM WITH PERFORMANCE vs INPUT CLOCK DUTY CYCLE INPUTS TIED TO COMMON-MODE Figure 25. Figure 26. 28 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): ADS5517 |