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ADS5545 Datasheet(PDF) 38 Page - Texas Instruments

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Part No. ADS5545
Description  11-BIT, 200 MSPS ADC
Download  54 Pages
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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ADS5545 Datasheet(HTML) 38 Page - Texas Instruments

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Power Scaling Modes
Power Supply Sequence
Digital Output Information
Output Interface
ADS5517
SLWS203 – DECEMBER 2007
ADS5517 has a power scaling mode in which the device can be operated at reduced power levels at lower
sampling frequencies with no difference in performance. (See Figure 29)(1) There are four power scaling modes
for different sampling clock frequency ranges, using the serial interface register bits <SCALING> (Table 16).
Only the AVDD power is scaled, leaving the DRVDD power unchanged.
Table 19. Power Scaling vs Sampling Speed
Sampling Frequency
Analog Power
Power Scaling Mode
Analog Power in Default Mode
MSPS
(Typical)
> 150
Default
1010 mW at 200 MSPS
1010 mW at 200 MSPS
105 to 150
Power Mode 1
841 mW at 150 MSPS
917 mW at 150 MSPS
50 to 105
Power Mode 2
670 mW at 105 MSPS
830 mW at 105 MSPS
< 50
Power Mode 3
525 mW at 50 MSPS
760 mW at 50 MSPS
(1)
The performance in the power scaling modes is from characterization and not tested in production.
During power-up, the AVDD and DRVDD supplies can come up in any sequence. The two supplies are
separated inside the device. Externally, AVDD and DRVDD can be driven from separate supplies or from a
single supply.
ADS5517 provides 11-bit data, an output clock synchronized with the data and an out-of-range indicator that
goes high when the output reaches the full-scale limits. In addition, output enable control (OE pin 7) is provided
to power down the output buffers and put the outputs in high-impedance state.
Two output interface options are available – Double Data Rate (DDR) LVDS and parallel CMOS. The options are
selected using the DFS (see Table 6) or the serial interface register bit <ODI> (Table 15).
38
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Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): ADS5517


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