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ADS5545 Datasheet(PDF) 35 Page - Texas Instruments

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Part No. ADS5545
Description  11-BIT, 200 MSPS ADC
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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ADS5545 Datasheet(HTML) 35 Page - Texas Instruments

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External Reference
Full−scale differential input pp + (Voltage forced on VCM)
1.33
(2)
Low Sampling Frequency Operation
Clock Input
CLKP
VCM
5kW
5kW
CLKM
VCM
ADS5517
SLWS203 – DECEMBER 2007
When the device is in external reference mode, the VCM acts as a reference input pin. The voltage forced on the
VCM pin is buffered and gained by 1.33 internally, generating the REFP and REFM voltages. The differential
input voltage corresponding to full-scale is given by Equation 2.
In this mode, the 1.5 V common-mode voltage to bias the input pins has to be generated externally. There is no
change in performance compared to internal reference mode.
For best performance at high sampling frequencies, ADS5517 uses a clock generator circuit to derive internal
timing for the ADC. The clock generator operates from 200 MSPS down to 50 MSPS in the DEFAULT SPEED
mode. The ADC enters this mode after applying reset (with serial interface configuration) or by tying SCLK pin to
low (with parallel configuration).
For low sampling frequencies (below 50 MSPS), the ADC must be put in the LOW SPEED mode. This mode can
be entered by:
• setting the register bit <LOW SPEED> through the serial interface, OR
• tying the SCLK pin to high (see Table 3) using the parallel configuration.
ADS5517 clock inputs can be driven differentially (SINE, LVPECL or LVDS) or single-ended (LVCMOS), with
little or no difference in performance between configurations. The common-mode voltage of the clock inputs is
set to VCM using internal 5-k
Ω resistors as shown in Figure 39. This allows the use of transformer-coupled drive
circuits for sine wave clock, or ac-coupling for LVPECL, LVDS clock sources (Figure 40 and Figure 41)
Figure 39. Internal Clock Buffer
Copyright © 2007, Texas Instruments Incorporated
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