M93C86, M93C76, M93C66, M93C56, M93C46

Instructions

15/37

Figure 4.

READ, WRITE, WEN, WDS sequences

1.

For the meanings of An, Xn, Qn and Dn, see Table 5., Table 6. and Table 7..

5.3

Erase Byte or Word

The Erase Byte or Word (ERASE) instruction sets the bits of the addressed memory byte (or

word) to 1. Once the address has been correctly decoded, the falling edge of the Chip

Select Input (S) starts the self-timed Erase cycle. The completion of the cycle can be

detected by monitoring the READY/BUSY line, as described in the READY/BUSY status

section.

AI00878d

1 1 0 An

A0

Qn

Q0

DATA OUT

D

S

Q

Read

S

Write

ADDR

OP

CODE

1 0An

A0

DATA IN

D

Q

OP

CODE

Dn

D0

1

BUSY

READY

S

Write

Enable

1

0Xn X0

D

OP

CODE

1

01

S

Write

Disable

1

0Xn X0

D

OP

CODE

0

0

0

CHECK

STATUS

ADDR