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M93S66 Datasheet(PDF) 23 Page - STMicroelectronics

Part No. M93S66
Description  4Kbit, 2Kbit and 1Kbit 16-bit wide MICROWIRE Serial Access EEPROM with Block Protection
Download  34 Pages
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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M93S66 Datasheet(HTML) 23 Page - STMicroelectronics

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M93S66, M93S56, M93S46
Table 17. AC Characteristics (M93Sx6-W, Device Grade 6)
Note: 1. tCHCL + tCLCH ≥ 1 / fC.
2. Chip Select Input (S) must be brought Low for a minimum of tSLSH between consecutive instruction cycles.
3. Current product: identified by Process Identification letter F or M.
4. New product: identified by Process Identification letter W or G.
Test conditions specified in Table 9. and Table 6.
Symbol
Alt.
Parameter
Min.3
Max.3
Min.4
Max.4
Unit
fC
fSK
Clock Frequency
D.C.
1
D.C.
2
MHz
tPRVCH
tPRES
Protect Enable Valid to Clock High
50
50
ns
tWVCH
tPES
Write Enable Valid to Clock High
50
50
ns
tCLPRX
tPREH
Clock Low to Protect Enable Transition
0
0
ns
tSLWX
tPEH
Chip Select Low to Write Enable
Transition
250
250
ns
tSLCH
Chip Select Low to Clock High
250
50
ns
tSHCH
tCSS
Chip Select Set-up Time
100
50
ns
tSLSH
2
tCS
Chip Select Low to Chip Select High
1000
200
ns
tCHCL
1
tSKH
Clock High Time
350
200
ns
tCLCH
1
tSKL
Clock Low Time
250
200
ns
tDVCH
tDIS
Data In Set-up Time
100
50
ns
tCHDX
tDIH
Data In Hold Time
100
50
ns
tCLSH
tSKS
Clock Set-up Time (relative to S)
100
50
ns
tCLSL
tCSH
Chip Select Hold Time
0
0
ns
tSHQV
tSV
Chip Select to Ready/Busy Status
400
200
ns
tSLQZ
tDF
Chip Select Low to Output Hi-Z
200
100
ns
tCHQL
tPD0
Delay to Output Low
400
200
ns
tCHQV
tPD1
Delay to Output Valid
400
200
ns
tW
tWP
Erase/Write Cycle time
10
5
ms


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