SN75ALS170, SN75ALS170A

TRIPLE DIFFERENTIAL BUS TRANSCEIVER

SLLS055D – AUGUST 1987 – REVISED SEPTEMBER 1995

9

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

0 V

TEST CIRCUIT

VOLTAGE WAVEFORMS

VOLTAGE WAVEFORMS

Output

RL2 = 75 Ω

RL1 = 165 Ω

5 V

0 V

S1

CL = 60 pF

(see Note B)

3V

S2

RL3 = 165 Ω

50

Ω

Generator

(see Note A)

Input

Output

S2 to 0 V

S1 to 5 V

≈ 2.9 V

0 V

3 V

10%

90%

90%

10%

0 V

tt(OD)

td(ODL)

tt(OD)

td(ODH)

Output

Input

1.5 V

≈ – 2.9 V

CL = 60 pF

(see Note B)

5 V

0 V

1.5 V

1.5 V

1.5 V

0 V

3 V

S2 to 5 V

S1 to 0 V

td(ODL)

td(ODH)

90%

10%

0 V

0 V

10%

90%

tt(OD)

tt(OD)

≈ 2.3 V

≈ – 2.9 V

NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR

≤ 1 MHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns,

ZO = 50 Ω.

B. CL includes probe and jig capacitance.

Figure 4. Driver Test Circuit and Voltage Waveforms With Double-Differential-SCSI

Termination for the Load

–IOH

VOH

+IOL

VOL

VID