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M74HC76-1 Datasheet(PDF) 1 Page - STMicroelectronics

Part No. M74HC76-1
Description  DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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M74HC76-1 Datasheet(HTML) 1 Page - STMicroelectronics

 
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August 2001
s
HIGH SPEED :
fMAX = 67MHz (TYP.) at VCC = 6V
s
LOW POWER DISSIPATION:
ICC =2µA(MAX.) at TA=25°C
s
HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.)
s
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
s
BALANCED PROPAGATION DELAYS:
tPLH tPHL
s
WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 76
DESCRIPTION
The M74HC76 is an high speed CMOS DUAL J-K
FLIP FLOP WITH CLEAR fabricated with silicon
gate C2MOS technology.
Depending on with the logic level at J and K
inputs, this device changes state on the negative
going transition of clock pulse (CK). CLEAR (CLR)
and PRESET (PR) are independent of the clock
and are accomplished by a logic low on the
corresponding input.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HC76
DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
M74HC76B1R
SOP
M74HC76M1R
M74HC76RM13TR
TSSOP
M74HC76TTR
TSSOP
DIP
SOP


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