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ISO7231ADW Datasheet(PDF) 10 Page - Texas Instruments |
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ISO7231ADW Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 17 page  DEVICE INFORMATION PACKAGE CHARACTERISTICS REGULATORY INFORMATION DEVICE I/O SCHEMATICS OUT 8 W 13 W VCC2 Output IN VCC1 VCC2 VCC1 Input 1MW VCC2 500 W VCC2 EN Enable 500 W 1MW ISO7230A ISO7231A SLLS906 – MAY 2008 ........................................................................................................................................................................................................ www.ti.com PARAMETER TEST CONDITIONS MIN TYP MAX UNIT L(I01) Minimum air gap (Clearance) Shortest terminal-to-terminal distance through air 7.7 mm L(I02) Minimum external tracking (Creepage) Shortest terminal-to-terminal distance across the 8.1 mm package surface Minimum Internal Gap (Internal Distance through the insulation 0.008 mm Clearance) Input to output, VIO = 500 V, all pins on each side of the barrier tied together creating a two-terminal device, >1012 Ω RIO Isolation resistance TA < 100°C Input to output, VIO = 500 V, 100°C ≤ TA ≤ TA max >1011 Ω CIO Barrier capacitance Input to output VI = 0.4 sin (4E6πt) 2 pF CI Input capacitance to ground VI = 0.4 sin (4E6πt) 2 pF VDE CSA UL Recognized under 1577 Certified according to IEC Approved under CSA Component Component Recognition 60747-5-2 Acceptance Notice Program(1) File Number: 40016131 File Number: 1698195 File Number: E181974 (1) Production tested ≥ 3000 VRMS for 1 second in accordance with UL 1577. 10 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): ISO7230A ISO7231A |
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