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M68AF127BM55NK6T Datasheet(PDF) 13 Page - STMicroelectronics |
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M68AF127BM55NK6T Datasheet(HTML) 13 Page - STMicroelectronics |
13 / 23 page 13/23 M68AF127B Table 7. Read and Standby Mode AC Characteristics Note: 1. Test conditions assume transition timing reference level = 0.3VCC or 0.7VCC. 2. At any given temperature and voltage condition, tGHQZ is less than tGLQX and tEHQZ is less than tELQX for any given device. 3. These parameters are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels. Symbol Parameter M68AF127B Unit 55 70 tAVAV Read Cycle Time Min 55 70 ns tAVQV Address Valid to Output Valid Max 55 70 ns tAXQX (1) Data hold from address change Min 5 5 ns tEHQZ (2,3) Chip Enable High to Output Hi-Z Max 20 25 ns tELQV Chip Enable Low to Output Valid Max 55 70 ns tELQX (1) Chip Enable Low to Output Transition Min 5 5 ns tGHQZ (2,3) Output Enable High to Output Hi-Z Max 20 25 ns tGLQV Output Enable Low to Output Valid Max 25 35 ns tGLQX (2) Output Enable Low to Output Transition Min 5 5 ns tPD Chip Enable or UB/LB High to Power Down Max 55 70 ns tPU Chip Enable or UB/LB Low to Power Up Min 0 0 ns |
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