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M54HC76 Datasheet(PDF) 1 Page - STMicroelectronics

Part No. M54HC76
Description  DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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M54HC76 Datasheet(HTML) 1 Page - STMicroelectronics

 
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M54HC76
M74HC76
October 1992
DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
B1R
(Plastic Package)
ORDER CODES :
M54HC76F1R
M74HC76M1R
M74HC76B1R
M74HC76C1R
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
INPUT AND OUTPUT EQUIVALENT CIRCUIT
.
HIGH SPEED
fMAX = 65 MHz (TYP.) AT VCC =5 V
.
LOW POWER DISSIPATION
ICC =2
µA (MAX.) AT 25 °C
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
IOH =IOL = 4 mA (MIN.)
.
BALANCED PROPAGATION DELAYS
tPLH =tPHL
.
HIGH NOISE IMMUNITY
VNIH =VNIL =28 % VCC (MIN.)
.
WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
.
PIN AND FUNCTION COMPATIBLE WITH
54/74LS76
The M54/74HC76 is a high speed CMOS DUAL J-K
FLIP FLOP fabricated in silicon gate C
2MOS tech-
nology. It has the same high speed performance of
LSTTL combined with true CMOS low power con-
sumption. Depending on with the logic level at the J
and K inputs this device changes state on the nega-
tive going transition of the clock pulse. CLEAR and
PRESET are independent of the clock and are ac-
complished by a logic low on the corresponding
input. All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
DESCRIPTION
1/11


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