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CS5460 Datasheet(PDF) 23 Page - Cirrus Logic |
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CS5460 Datasheet(HTML) 23 Page - Cirrus Logic |
23 / 34 page CS5460 DS279PP5 23 4.4 Cycle Count Register Address: RA[4:0]* = 0x05 Default** = 4000 The Cycle Count Register determines the length of an energy and RMS conversion. A conversion cycle is de- rived from (MCLK/K)/(1024 ∗N) where MCLK is master clock, K is clock divider, and N is cycle count. N must be greater than 10 for IRMS, VRMS and energy calculations to be performed. 4.5 Pulse-Rate Register Address: RA[4:0]* = 0x06 Default** = 32000.00Hz The Pulse-Rate Register determines the frequency of the train of pulses output on the EOUT pin. Each EOUT pulse represents a predetermined magnitude of energy.The register’s smallest valid value is 2-4 but can be in 2-5 increments. 4.6 I,V,P,E Signed Output Register Results Address: RA[4:0]* = 0x07 - 0x0A Access: Read Only The Signed Registers contain the last value of the measured results of I, V, P, and E. The results are in the range of -1.0 ≤ I, V, P, E < 1.0. The value is represented in two's complement notation, with the binary point place to the right of the MSB (which is the sign bit). I, V, P, and E are output results registers which contain signed values. 4.7 IRMS, VRMS Unsigned Output Register Results Address: RA[4:0]* = 0x0B - 0x0C Access: Read Only The Unsigned Registers contain the last value of the calculated results of IRMS and VRMS. The results are in the range of 0.0 ≤ I RMS,VRMS < 1.0. The value is represented in binary notation, with the binary point place to the left of the MSB. IRMS and VRMS are output result registers which contain unsigned values. MSB LSB 223 222 221 220 219 218 217 216 ..... 26 25 24 23 22 21 20 MSB LSB 218 217 216 215 214 213 212 211 ..... 21 20 2-1 2-2 2-3 2-4 2-5 MSB LSB SIGN 2-1 2-2 2-3 2-4 2-5 2-6 2-7 ..... 2-17 2-18 2-19 2-20 2-21 2-22 2-23 MSB LSB 2-1 2-2 2-3 2-4 2-5 2-6 2-7 2-8 ..... 2-18 2-19 2-20 2-21 2-22 2-23 2-24 |
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