DS18B20

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CONFIGURATION REGISTER

Byte 4 of the scratchpad memory contains the configuration register, which is organized as illustrated in

Figure 8. The user can set the conversion resolution of the DS18B20 using the R0 and R1 bits in this

register as shown in Table 2. The power-up default of these bits is R0 = 1 and R1 = 1 (12-bit resolution).

Note that there is a direct tradeoff between resolution and conversion time. Bit 7 and bits 0 to 4 in the

configuration register are reserved for internal use by the device and cannot be overwritten.

Figure 8. Configuration Register

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

0

R1

R0

1

1

1

1

1

Table 2. Thermometer Resolution Configuration

R1

R0

RESOLUTION

(BITS)

MAX CONVERSION

TIME

0

0

9

93.75ms

0

1

10

187.5ms

1

0

11

375ms

1

1

12

750ms

CRC GENERATION

CRC bytes are provided as part of the DS18B20’s 64-bit ROM code and in the 9

memory. The ROM code CRC is calculated from the first 56 bits of the ROM code and is contained in the

most significant byte of the ROM. The scratchpad CRC is calculated from the data stored in the

scratchpad, and therefore it changes when the data in the scratchpad changes. The CRCs provide the bus

master with a method of data validation when data is read from the DS18B20. To verify that data has

been read correctly, the bus master must re-calculate the CRC from the received data and then compare

this value to either the ROM code CRC (for ROM reads) or to the scratchpad CRC (for scratchpad reads).

If the calculated CRC matches the read CRC, the data has been received error free. The comparison of

CRC values and the decision to continue with an operation are determined entirely by the bus master.

There is no circuitry inside the DS18B20 that prevents a command sequence from proceeding if the

DS18B20 CRC (ROM or scratchpad) does not match the value generated by the bus master.

The equivalent polynomial function of the CRC (ROM or scratchpad) is:

CRC = X

The bus master can re-calculate the CRC and compare it to the CRC values from the DS18B20 using the

polynomial generator shown in Figure 9. This circuit consists of a shift register and XOR gates, and the

shift register bits are initialized to 0. Starting with the least significant bit of the ROM code or the least

significant bit of byte 0 in the scratchpad, one bit at a time should shifted into the shift register. After

shifting in the 56th bit from the ROM or the most significant bit of byte 7 from the scratchpad, the

polynomial generator will contain the re-calculated CRC. Next, the 8-bit ROM code or scratchpad CRC

from the DS18B20 must be shifted into the circuit. At this point, if the re-calculated CRC was correct, the

shift register will contain all 0s. Additional information about the Maxim 1-Wire cyclic redundancy check