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MAX9779 Datasheet(PDF) 15 Page - Maxim Integrated Products |
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MAX9779 Datasheet(HTML) 15 Page - Maxim Integrated Products |
15 / 19 page 2.6W Stereo Audio Power Amplifier and DirectDrive Headphone Amplifier ______________________________________________________________________________________ 15 SUPPLIER PHONE FAX WEBSITE Taiyo Yuden 800-348-2496 847-925-0899 www.t-yuden.com TDK 807-803-6100 847-390-4405 www.component.tdk.com Table 2. Suggested Capacitor Manufacturers BIAS Capacitor BIAS is the output of the internally generated DC bias voltage. The BIAS bypass capacitor, CBIAS, improves PSRR and THD+N by reducing power supply and other noise sources at the common-mode bias node, and also generates the clickless/popless, startup/shutdown DC bias waveforms for the speaker amplifiers. Bypass BIAS with a 1µF capacitor to GND. Charge-Pump Capacitor Selection Use capacitors with an ESR less than 100m Ω for opti- mum performance. Low-ESR ceramic capacitors mini- mize the output resistance of the charge pump. For best performance over the extended temperature range, select capacitors with an X7R dielectric. Table 4 lists suggested manufacturers. Flying Capacitor (C1) The value of the flying capacitor (C1) affects the load regulation and output resistance of the charge pump. A C1 value that is too small degrades the device’s ability to provide sufficient current drive, which leads to a loss of output voltage. Increasing the value of C1 improves load regulation and reduces the charge-pump output resistance to an extent. See the Output Power vs. Charge-Pump Capacitance and Load Resistance graph in the Typical Operating Characteristics. Above 2.2µF, the on-resistance of the switches and the ESR of C1 and C2 dominate. Output Capacitor (C2) The output capacitor value and ESR directly affect the ripple at CPVSS. Increasing the value of C2 reduces output ripple. Likewise, decreasing the ESR of C2 reduces both ripple and output resistance. Lower capacitance values can be used in systems with low maximum output power levels. See the Output Power vs. Charge-Pump Capacitance and Load Resistance graph in the Typical Operating Characteristics. CPVDD Bypass Capacitor The CPVDD bypass capacitor (C3) lowers the output impedance of the power supply and reduces the impact of the MAX9779’s charge-pump switching transients. Bypass CPVDD with C3, the same value as C1, and place it physically close to CPVDD and PGND (refer to the MAX9779 Evaluation Kit for a suggested layout). Powering Other Circuits from a Negative Supply An additional benefit of the MAX9779 is the internally gen- erated negative supply voltage (CPVSS). CPVSS is used by the MAX9779 to provide the negative supply for the headphone amplifiers. It can also be used to power other devices within a design. Current draw from CPVSS should be limited to 5mA; exceeding this affects the operation of the headphone amplifier. A typical application is a nega- tive supply to adjust the contrast of LCD modules. When considering the use of CPVSS in this manner, note that the charge-pump voltage of CPVSS is roughly proportional to CPVDD and is not a regulated voltage. The charge-pump output impedance plot appears in the Typical Operating Characteristics. Layout and Grounding Proper layout and grounding are essential for optimum performance. Use large traces for the power-supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance, as well as route head away from the device. Good grounding improves audio per- formance, minimizes crosstalk between channels, and prevents any switching noise from coupling into the audio signal. Connect CPGND, PGND, and GND together at a single point on the PC board. Route CPGND and all traces that carry switching transients away from GND, PGND, and the traces and components in the audio signal path. Connect all components associated with the charge pump (C2 and C3) to the CPGND plane. Connect VSS and CPVSS together at the device. Place the charge- pump capacitors (C1, C2, and C3) as close to the device as possible. Bypass HPVDD and PVDD with a 0.1µF capacitor to GND. Place the bypass capacitors as close to the device as possible. Use large, low-resistance output traces. As load imped- ance decreases, the current drawn from the device out- puts increase. At higher current, the resistance of the output traces decrease the power delivered to the load. |
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