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TMS320F2810 Datasheet(PDF) 80 Page - Texas Instruments |
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TMS320F2810 Datasheet(HTML) 80 Page - Texas Instruments |
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80 / 173 page  Peripherals 80 April 2001 − Revised July 2007 SPRS174O Figure 4−10 shows the SCI module block diagram. TX FIFO _0 LSPCLK WUT Frame Format and Mode Even/Odd Enable Parity SCI RX Interrupt select logic BRKDT RXRDY SCIRXST.6 SCICTL1.3 8 SCICTL2.1 RX/BK INT ENA SCIRXD SCIRXST.1 TXENA SCI TX Interrupt select logic TX EMPTY TXRDY SCICTL2.0 TX INT ENA SCITXD RXENA SCIRXD RXWAKE SCICTL1.6 RX ERR INT ENA TXWAKE SCITXD SCICCR.6 SCICCR.5 SCITXBUF.7−0 SCIHBAUD. 15 − 8 Baud Rate MSbyte Register SCILBAUD. 7 − 0 Transmitter−Data Buffer Register 8 SCICTL2.6 SCICTL2.7 Baud Rate LSbyte Register RXSHF Register TXSHF Register SCIRXST.5 1 TX FIFO _1 −−−−− TX FIFO _15 8 TX FIFO registers TX FIFO TX Interrupt Logic TXINT SCIFFTX.14 RX FIFO _15 SCIRXBUF.7−0 Receive Data Buffer register SCIRXBUF.7−0 −−−−− RX FIFO_1 RX FIFO _0 8 RX FIFO registers SCICTL1.0 RX Interrupt Logic RXINT RX FIFO SCIFFRX.15 RXFFOVF RX Error SCIRXST.7 PE FE OE RX Error SCIRXST.4 − 2 To CPU To CPU AutoBaud Detect logic SCICTL1.1 SCIFFENA Interrupts Interrupts Figure 4−10. Serial Communications Interface (SCI) Module Block Diagram |
Similar Part No. - TMS320F2810_08 |
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Similar Description - TMS320F2810_08 |
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