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M29W800AT80ZA6T Datasheet(PDF) 2 Page - STMicroelectronics |
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M29W800AT80ZA6T Datasheet(HTML) 2 Page - STMicroelectronics |
2 / 33 page M29W800AT, M29W800AB 2/33 Figure 2. TSOP Connections DQ3 DQ9 DQ2 A6 DQ0 W A3 RB DQ6 A8 A9 DQ13 A17 A10 DQ14 A2 DQ12 DQ10 DQ15A–1 VCC DQ4 DQ5 A7 DQ7 NC NC AI02179 M29W800T M29W800B 12 1 13 24 25 36 37 48 DQ8 NC NC A1 A18 A4 A5 DQ1 DQ11 G A12 A13 A16 A11 BYTE A15 A14 VSS E A0 RP VSS Figure 3. SO Connections G DQ0 DQ8 A3 A0 E VSS A2 A1 A13 VSS A14 A15 DQ7 A12 A16 BYTE DQ15A–1 DQ5 DQ2 DQ3 VCC DQ11 DQ4 DQ14 A9 W RB A4 RP A7 AI02181 M29W800T M29W800B 8 2 3 4 5 6 7 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 20 19 18 17 DQ1 DQ9 A6 A5 DQ6 DQ13 44 39 38 37 36 35 34 33 A11 A10 DQ10 21 DQ12 40 43 1 42 41 A17 A8 A18 Table 1. Signal Names A0-A18 Address Inputs DQ0-DQ7 Data Input/Outputs, Command Inputs DQ8-DQ14 Data Input/Outputs DQ15A–1 Data Input/Output or Address Input E Chip Enable G Output Enable W Write Enable RP Reset/Block Temporary Unprotect RB Ready/Busy Output BYTE Byte/Word Organization VCC Supply Voltage VSS Ground NC Not Connected Internally DU Don’t Use as Internally Connected DESCRIPTION The M29W800A is a non-volatile memory that may be erased electrically at the block or chip level and programmed in-system on a Byte-by-Byte or Word-by-Word basis using only a single 2.7V to 3.6V VCC supply. For Program and Erase opera- tions the necessary high voltages are generated internally. The device can also be programmed in standard programmers. The array matrix organisation allows each block to be erased and reprogrammed without affecting other blocks. Blocks can be protected against pro- graming and erase on programming equipment, and temporarily unprotected to make changes in the application. Each block can be programmed and erased over 100,000 cycles. Instructions for Read/Reset, Auto Select for read- ing the Electronic Signature or Block Protection status, Programming, Block and Chip Erase, Erase Suspend and Resume are written to the de- vice in cycles of commands to a Command Inter- face using standard microprocessor write timings. The device is offered in TSOP48 (12 x 20mm), SO44 and LFBGA48 0.8 mm ball pitch packages. |
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