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See mechanical drawings for dimensions.

DBV PACKAGE

(TOP VIEW)

5

1

V

CC

A

2

B

3

4

GND

Y

DRL PACKAGE

(TOP VIEW)

2

B

V

CC

5

1

A

3

4

GND

GND

Y

DCK PACKAGE

(TOP VIEW)

2

B

3

4

GND

V

CC

5

A

Y

1

YZP PACKAGE

(BOTTOM VIEW)

2

B

V

CC

1 5

A

GND

4

3

Y

DESCRIPTION/ORDERING INFORMATION

SN74LVC1G86

SINGLE 2-INPUT EXCLUSIVE-OR GATE

SCES222N – APRIL 1999 – REVISED FEBRUARY 2007

• Available in the Texas Instruments

Operation

NanoFree™ Package

• Latch-Up Performance Exceeds 100 mA Per

• Supports 5-V V

JESD 78, Class II

• Inputs Accept Voltages to 5.5 V

• ESD Protection Exceeds JESD 22

• Max t

–

2000-V Human-Body Model (A114-A)

• Low Power Consumption, 10-µA Max I

CC

–

200-V Machine Model (A115-A)

• ±24-mA Output Drive at 3.3 V

–

1000-V Charged-Device Model (C101)

• I

The SN74LVC1G86 performs the Boolean function Y = A

⊕ B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If the input is low, the other input is reproduced in true

form at the output. If the input is high, the signal on the other input is reproduced inverted at the output.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

ORDERABLE PART NUMBER

NanoFree™ – WCSP (DSBGA)

Reel of 3000

SN74LVC1G86YZPR

_ _ _CH_

0.23-mm Large Bump – YZP (Pb-free)

Reel of 3000

SN74LVC1G86DBVR

SOT (SOT-23) – DBV

C86_

–40°C to 85°C

Reel of 250

SN74LVC1G86DBVT

Reel of 3000

SN74LVC1G86DCKR

SOT (SC-70) – DCK

CH_

Reel of 250

SN74LVC1G86DCKT

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2)

DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 1999–2007, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.