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M29W800AT Datasheet(PDF) 20 Page - STMicroelectronics |
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M29W800AT Datasheet(HTML) 20 Page - STMicroelectronics |
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20 / 33 page  M29W800AT, M29W800AB 20/33 Table 19. Write AC Characteristics, E Controlled (TA = 0 to 70°C, –20 to 85°C or –40 to 85°C) Note: 1. Sampled only, not 100% tested. 2. This timing is for Temporary Block Unprotection operation. Symbol Alt Parameter M29W800AT / M29W800AB Unit 80 90 VCC = 3.0V to 3.6V CL = 30pF VCC = 3.0V to 3.6V CL = 30pF Min Max Min Max tAVAV tWC Address Valid to Next Address Valid 80 90 ns tAVEL tAS Address Valid to Chip Enable Low 0 0 ns tDVEH tDS Input Valid to Chip Enable High 35 45 ns tEHDX tDH Chip Enable High to Input Transition 0 0 ns tEHEL tCPH Chip Enable High to Chip Enable Low 30 30 ns tEHGL tOEH Chip Enable High to Output Enable Low 0 0 ns tEHRL (1) tBUSY Program Erase Valid to RB Delay 80 90 ns tEHWH tWH Chip Enable High to Write Enable High 0 0 ns tELAX tAH Chip Enable Low to Address Transition 45 45 ns tELEH tCP Chip Enable Low to Chip Enable High 35 35 ns tGHEL Output Enable High Chip Enable Low 0 0 ns tPHPHH (1, 2) tVIDR RP Rise TIme to VID 500 500 ns tPHWL (1) tRSP RP High to Write Enable Low 4 4 µs tPLPX tRP RP Pulse Width 500 500 ns tVCHWL tVCS VCC High to Write Enable Low 50 50 µs tWLEL tWS Write Enable Low to Chip Enable Low 0 0 ns POWER SUPPLY Power Up The memory Command Interface is reset on pow- er up to Read Array. The device does not accept commands on the first rising edge of W, if both W and E are at VIL with G at VIH during power-up. Any write cycle initiation is blocked when VCC is below VLKO. Supply Rails Normal precautions must be taken for supply volt- age decoupling; each device in a system should have the VCC rail decoupled with a 0.1µF capacitor close to the VCC and VSS pins. The PCB trace widths should be sufficient to carry the VCC pro- gram and erase currents required. |
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