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M29W102BT Datasheet(PDF) 2 Page - STMicroelectronics

Part No. M29W102BT
Description  1 Mbit 64Kb x16, Boot Block Low Voltage Single Supply Flash Memory
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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M29W102BT Datasheet(HTML) 2 Page - STMicroelectronics

 
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M29W102BT, M29W102BB
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Figure 2. TSOP Connections
DQ6
DQ3
DQ2
DQ13
DQ8
DQ7
DQ10
DQ9
A14
A8
A11
A10
A4
A15
A9
G
A7
A2
DQ1
DQ0
A0
A1
A3
NC
W
E
DQ14
RP
VCC
DQ15
AI02786
M29W102BT
M29W102BB
10
1
11
20
21
30
31
40
VSS
A13
A12
A6
A5
DQ11
DQ12
DQ5
DQ4
VSS
Table 1. Signal Names
A0-A15
Address Inputs
DQ0-DQ15
Data Inputs/Outputs
E
Chip Enable
G
Output Enable
W
Write Enable
RP
Reset/Block Temporary Unprotect
VCC
Supply Voltage
VSS
Ground
NC
Not Connected Internally
SUMMARY DESCRIPTION
The M29W102B is a 1 Mbit (64Kb x16) non-vola-
tile memory that can be read, erased and repro-
grammed. These operations can be performed
using a single low voltage (2.7 to 3.6V) supply. On
power-up the memory defaults to its Read mode
where it can be read in the same way as a ROM or
EPROM.
The memory is divided into blocks that can be
erased independently so it is possible to preserve
valid data while old data is erased. Each block can
be protected independently to prevent accidental
Program or Erase commands from modifying the
memory. Program and Erase commands are writ-
ten to the Command Interface of the memory. An
on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by
taking care of all of the special operations that are
required to update the memory contents. The end
of a program or erase operation can be detected
and any error conditions identified. The command
set required to control the memory is consistent
with JEDEC standards.
The blocks in the memory are asymmetrically ar-
ranged, see Tables 3 and 4, Block Addresses. The
first or last 32 Kwords have been divided into four
additional blocks. The 8 Kword Boot Block can be
used for small initialization code to start the micro-
processor, the two 4 Kword Parameter Blocks can
be used for parameter storage and the remaining
16 Kwords are a small Main Block where the appli-
cation may be stored.
Chip Enable, Output Enable and Write Enable sig-
nals control the bus operation of the memory.
They allow simple connection to most micropro-
cessors, often without additional logic.
The memory is offered in a TSOP40 (10 x 14mm)
package and it is supplied with all the bits erased
(set to ’1’).


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