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SPHE8281D/Dx
© Sunplus Confidential
Contents are subject to change without Notice
6
MAY. 19, 2005
Preliminary Version: 0.1
3.BLOCK DIAGRAM
Audio
Interface
Audio
DSP
MPEG
video
decoder
PLLv
RISC
Timer
SDRAM
controller
Sub-picture
decoder
OSD
decoder
Video post-
processing
EPROM/
SRAM
interface
SDRAM /16 or /32
EPROM/SRAM
GPIO
GPIO
IEC 958 I/O
icache
mem
icache dcache
Video
encoder
Video output
IR/VFD/(I2C)
UART
UART
Intr. control
ADC digital in
RISC DMA
Power control
I/O
processor
PLLa
Video DAC
Servo
Control
ECC
loader inf.
RF
loader RF input
Bootstrap
HOST
DMA
DAC
DAC analog out
USB 1.1
host
USB1.1 bus
Figure 3-1 SPHE8281D block diagram