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M28C16 Datasheet(PDF) 3 Page - STMicroelectronics

Part No. M28C16
Description  16K 2K x 8 PARALLEL EEPROM with SOFTWARE DATA PROTECTION
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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M28C16 Datasheet(HTML) 3 Page - STMicroelectronics

 
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Symbol
Parameter
Value
Unit
TA
Ambient Operating Temperature
– 40 to 125
°C
TSTG
Storage Temperature Range
– 65 to 150
°C
VCC
Supply Voltage
– 0.3 to 6.5
V
VIO
Input/Output Voltage
– 0.3 to VCC +0.6
V
VI
Input Voltage
– 0.3 to 6.5
V
VESD
Electrostatic Discharge Voltage (Human Body model)
(2)
4000
V
Notes: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other
relevant quality documents.
2. 100pF through 1500
Ω; MIL-STD-883C, 3015.7
Table 2. Absolute Maximum Ratings (1)
PIN DESCRIPTION
Addresses (A0-A10). The address inputs select
an 8-bit memory location during a read or write
operation.
Chip Enable (E). The chip enable input must be
low to enable all read/write operations. When Chip
Enable is high, power consumption is reduced.
Output Enable (G). The Output Enable input con-
trols the data output buffers and is used to initiate
read operations.
Data In/ Out (DQ0 - DQ7). Data is written to or read
from the M28C16 through the I/O pins.
Write Enable (W). The Write Enable input controls
the writing of data to the M28C16.
Ready/Busy (RB). Ready/Busy is an open drain
output that can be used to detect the end of the
internal write cycle.
It is offered only with the TSOP28 package. The
reader should refer to the M28C17 datasheet for
more information about the Ready/Busy func-
tion.
OPERATION
In order to prevent data corruption and inadvertent
write operations an internal VCC comparator inhib-
its Write operation if VCC is below VWI (see Table
7). Access to the memory in write mode is allowed
after a power-up as specified in Table 7.
Read
The M28C16 is accessed like a static RAM. When
E and G are low with W high, the data addressed
is presented on the I/O pins. The I/O pins are high
impedance when either G or E is high.
Write
Write operations are initiated when both W and E
are low and G is high.The M28C16 supports both
E and W controlled write cycles. The Address is
latched by the falling edge of E or W which ever
occurs last and the Data on the rising edge of E or
W which ever occurs first. Once initiated the write
operation is internally timed until completion.
Mode
E
G
W
DQ0 - DQ7
Standby
1
X
X
Hi-Z
Output Disable
X
1
X
Hi-Z
Write Disable
X
X
1
Hi-Z
Read
0
0
1
Data Out
Write
0
1
0
Data In
Chip Erase
0
V
0
Hi-Z
Note: 1. 0 = VIL;1 = VIH;X = VIL or VIH; V= 12
± 5%.
Table 3. Operating Modes
(1)
3/18
M28C16


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