Electronic Components Datasheet Search |
|
ESSDC64 Datasheet(PDF) 5 Page - Eorex Corporation |
|
ESSDC64 Datasheet(HTML) 5 Page - Eorex Corporation |
5 / 6 page 64MB/128MB/256MB/512MB Secure Digital Card Eorex Corporation www.eorex.com 5/6 5. Bus Timing Parameter Symbol Min Max Unit Remark Clock CLK (All values are referred to min (VIH) and max (VIL) Clock frequency Data Transfer Mode fpp 0 20 MHz CL<100pF,(7 cards) Clock frequency Identification Mode (The low freq. is required for MultiMediaCard compatibility.) fOD 0 400 KHz CL<250pF,(21 cards) tWL 10 ns CL≤100pF, (7 cards) Clock low time 50 ns CL≤250pF, (21 cards) tWH 10 ns CL≤100pF, (7 cards) Clock high time 50 ns CL≤250pF, (21 cards) tTLH 10 ns CL≤100pF, (7 cards) Clock rise time 50 ns CL≤250pF, (21 cards) tTHL 10 ns CL≤100pF, (7 cards) Clock fall time 50 ns CL≤250pF, (21 cards) Inputs CMD, DAT (referenced to CLK) Input set-up time fISU 5 ns CL<25pF,(1 cards) Input hold time fIH 5 ns CL<25pF,(1 cards) Outputs CMD, DAT (referenced to CLK) Output Delay time fODLY 0 14 ns CL<25pF,(1 cards) |
Similar Part No. - ESSDC64 |
|
Similar Description - ESSDC64 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |