SN75LVDS84A, SN65LVDS84AQ

FLATLINK

 TRANSMITTER

SLLS354E – MAY 1999 – REVISED JANUARY 2001

2

POST OFFICE BOX 655303

description (continued)

The ’LVDS84A requires no external components and little or no control. The data bus appears the same at the

input to the transmitter and output of the receiver with the data transmission transparent to the user(s). The only

user intervention is the possible use of the shutdown/clear (SHTDN) active-low input to inhibit the clock and shut

off the LVDS output drivers for lower power consumption. A low-level on this signal clears all internal registers

to a low level.

The SN75LVDS84A is characterized for operation over ambient free-air temperatures of 0

°C to 70°C. The

SN65LVDS84AQ is characterized for operation over the full Automotive temperature range of – 40

°C to 125°C.

functional block diagram

A,B, ...G

SHIFT/LOAD

CLK

Parallel-Load 7-Bit

Shift Register

7

A,B, ...G

SHIFT/LOAD

CLK

Parallel-Load 7-Bit

Shift Register

7

A,B, ...G

SHIFT/LOAD

CLK

Parallel-Load 7-Bit

Shift Register

7

Control Logic

CLK

CLKINH

PLL

SHTDN

CLKIN

D14 – D20

D7 – D13

D0 – D6

Y0P

Y0M

Y1P

Y1M

Y2P

Y2M

CLKOUTP

CLKOUTM